mb/siemens/mc_ehl2: Provide I2C timing parameter for SSDT

Provide timing parameter for SSDT generation to achieve the requested
100 kHz speed with a high accuracy.

Test: Measure I2C bus clock, high and low times during I2C access from
Linux and confirm they match the specification.

Change-Id: Ifb6019421b612133b8f25c076519bc0e7200dad8
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69307
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Werner Zeh
2022-11-07 15:21:40 +01:00
committed by Felix Held
parent eda13db4e9
commit cc7634fd69

View File

@@ -111,9 +111,21 @@ chip soc/intel/elkhartlake
register "common_soc_config" = "{ register "common_soc_config" = "{
.i2c[1] = { .i2c[1] = {
.speed = I2C_SPEED_STANDARD, .speed = I2C_SPEED_STANDARD,
.speed_config[0] = {
.speed = I2C_SPEED_STANDARD,
.scl_hcnt = 0x1e1,
.scl_lcnt = 0x1f4,
.sda_hold = 0x64
},
}, },
.i2c[2] = { .i2c[2] = {
.speed = I2C_SPEED_STANDARD, .speed = I2C_SPEED_STANDARD,
.speed_config[0] = {
.speed = I2C_SPEED_STANDARD,
.scl_hcnt = 0x1df,
.scl_lcnt = 0x1f4,
.sda_hold = 0x64
},
}, },
}" }"