coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)

This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-03-05 16:53:33 -08:00
parent b3a8cc54db
commit cd49cce7b7
920 changed files with 2285 additions and 2285 deletions
--- a/src/drivers/amd/agesa/acpi_tables.c
+++ b/src/drivers/amd/agesa/acpi_tables.c
@@ -22,9 +22,9 @@
 /* Fields were removed from the structure and we cannot add them back
 * without new builds of the binaryPI blobs.
 */
-#if !IS_ENABLED(CONFIG_CPU_AMD_AGESA_BINARY_PI) || \
-	IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI_00630F01) || \
-	IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI_00730F01)
+#if !CONFIG(CPU_AMD_AGESA_BINARY_PI) || \
+	CONFIG(NORTHBRIDGE_AMD_PI_00630F01) || \
+	CONFIG(NORTHBRIDGE_AMD_PI_00730F01)

 #define HAS_ACPI_SRAT	TRUE
 #define HAS_ACPI_SLIT	TRUE
--- a/src/drivers/amd/agesa/cache_as_ram.S
+++ b/src/drivers/amd/agesa/cache_as_ram.S
@@ -107,7 +107,7 @@ _cache_as_ram_setup:
 	pushl	%eax
 	call	romstage_main

-#if IS_ENABLED(CONFIG_POSTCAR_STAGE)
+#if CONFIG(POSTCAR_STAGE)

 /* We do not return. Execution continues with run_postcar_phase()
 * calling to chipset_teardown_car below.
@@ -138,7 +138,7 @@ chipset_teardown_car:
 /* Register %esp is preserved in AMD_DISABLE_STACK. */
 	AMD_DISABLE_STACK

-#if IS_ENABLED(CONFIG_POSTCAR_STAGE)
+#if CONFIG(POSTCAR_STAGE)

 	jmp	*%esp

--- a/src/drivers/amd/agesa/def_callouts.c
+++ b/src/drivers/amd/agesa/def_callouts.c
@@ -25,9 +25,9 @@
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <northbridge/amd/agesa/dimmSpd.h>

-#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI)
-#if IS_ENABLED(CONFIG_ARCH_ROMSTAGE_X86_64) || \
-	IS_ENABLED(CONFIG_ARCH_RAMSTAGE_X86_64)
+#if CONFIG(NORTHBRIDGE_AMD_PI)
+#if CONFIG(ARCH_ROMSTAGE_X86_64) || \
+	CONFIG(ARCH_RAMSTAGE_X86_64)
 #error "FIXME: CALLOUT_ENTRY is UINT32 Data, not UINT Data"
 #endif
 #endif
--- a/src/drivers/amd/agesa/eventlog.c
+++ b/src/drivers/amd/agesa/eventlog.c
@@ -48,7 +48,7 @@ static const char *HeapStatusStr[] = {

 const char *agesa_struct_name(int state)
 {
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_OPENSOURCE)
+#if CONFIG(CPU_AMD_AGESA_OPENSOURCE)
 	if ((state < AMD_INIT_RECOVERY) || (state > AMD_IDENTIFY_DIMMS))
 		return undefined;

--- a/src/drivers/amd/agesa/heapmanager.c
+++ b/src/drivers/amd/agesa/heapmanager.c
@@ -26,7 +26,7 @@
 #define BIOS_HEAP_SIZE		0x30000
 #define BIOS_HEAP_START_ADDRESS	0x010000000

-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && (HIGH_MEMORY_SCRATCH < BIOS_HEAP_SIZE)
+#if CONFIG(HAVE_ACPI_RESUME) && (HIGH_MEMORY_SCRATCH < BIOS_HEAP_SIZE)
 #error Increase HIGH_MEMORY_SCRATCH allocation
 #endif

--- a/src/drivers/amd/agesa/oem_s3.c
+++ b/src/drivers/amd/agesa/oem_s3.c
@@ -31,7 +31,7 @@ typedef enum {
 #define S3_DATA_MTRR_SIZE			0x1000
 #define S3_DATA_NONVOLATILE_SIZE	0x1000

-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && \
+#if CONFIG(HAVE_ACPI_RESUME) && \
 	(S3_DATA_MTRR_SIZE + S3_DATA_NONVOLATILE_SIZE) > CONFIG_S3_DATA_SIZE
 #error "Please increase the value of S3_DATA_SIZE"
 #endif
@@ -94,7 +94,7 @@ AGESA_STATUS OemS3LateRestore(AMD_S3_PARAMS *dataBlock)

 static int spi_SaveS3info(u32 pos, u32 size, u8 *buf, u32 len)
 {
-#if IS_ENABLED(CONFIG_SPI_FLASH)
+#if CONFIG(SPI_FLASH)
 	struct spi_flash flash;

 	spi_init();
--- a/src/drivers/amd/agesa/romstage.c
+++ b/src/drivers/amd/agesa/romstage.c
@@ -28,7 +28,7 @@
 #include <northbridge/amd/agesa/agesa_helper.h>
 #include <northbridge/amd/agesa/state_machine.h>

-#if !IS_ENABLED(CONFIG_POSTCAR_STAGE)
+#if !CONFIG(POSTCAR_STAGE)
 #error "Only POSTCAR_STAGE is supported."
 #endif
 #if HAS_LEGACY_WRAPPER
--- a/src/drivers/amd/agesa/state_machine.c
+++ b/src/drivers/amd/agesa/state_machine.c
@@ -29,7 +29,7 @@

 #include <AMD.h>

-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_OPENSOURCE)
+#if CONFIG(CPU_AMD_AGESA_OPENSOURCE)
 #include "Dispatcher.h"
 #endif

@@ -40,7 +40,7 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {PSO_END};

 static void agesa_locate_image(AMD_CONFIG_PARAMS *StdHeader)
 {
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_BINARY_PI)
+#if CONFIG(CPU_AMD_AGESA_BINARY_PI)
 	const char ModuleIdentifier[] = AGESA_ID;
 	const void *agesa, *image;
 	size_t file_size;
@@ -62,7 +62,7 @@ void agesa_set_interface(struct sysinfo *cb)

 	cb->StdHeader.CalloutPtr = GetBiosCallout;

-	if (IS_ENABLED(CONFIG_CPU_AMD_AGESA_BINARY_PI)) {
+	if (CONFIG(CPU_AMD_AGESA_BINARY_PI)) {
 		agesa_locate_image(&cb->StdHeader);
 		AMD_IMAGE_HEADER *image =
 			(void *)(uintptr_t)cb->StdHeader.ImageBasePtr;
@@ -78,10 +78,10 @@ AGESA_STATUS module_dispatch(AGESA_STRUCT_NAME func,
 {
 	MODULE_ENTRY dispatcher;

-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_OPENSOURCE)
+#if CONFIG(CPU_AMD_AGESA_OPENSOURCE)
 	dispatcher = AmdAgesaDispatcher;
 #endif
-#if IS_ENABLED(CONFIG_CPU_AMD_AGESA_BINARY_PI)
+#if CONFIG(CPU_AMD_AGESA_BINARY_PI)
 	AMD_IMAGE_HEADER *image = (void *)(uintptr_t)StdHeader->ImageBasePtr;
 	AMD_MODULE_HEADER *module = (void *)(uintptr_t)image->ModuleInfoOffset;
 	dispatcher = module->ModuleDispatcher;
@@ -339,7 +339,7 @@ static void amd_bs_dev_enable(void *arg)
 		agesa_execute_state(cb, AMD_INIT_MID);

 	/* FIXME */
-	if (IS_ENABLED(CONFIG_AMD_SB_CIMX) && acpi_is_wakeup_s3())
+	if (CONFIG(AMD_SB_CIMX) && acpi_is_wakeup_s3())
 		sb_After_Pci_Restore_Init();
 }

--- a/src/drivers/elog/boot_count.c
+++ b/src/drivers/elog/boot_count.c
@@ -26,7 +26,7 @@
 * This can either be declared as part of the option
 * table or statically defined in the board config.
 */
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
 # include "option_table.h"
 # define BOOT_COUNT_CMOS_OFFSET (CMOS_VSTART_boot_count_offset >> 3)
 #else
--- a/src/drivers/elog/elog.c
+++ b/src/drivers/elog/elog.c
@@ -13,14 +13,14 @@
 * GNU General Public License for more details.
 */

-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#if CONFIG(HAVE_ACPI_RESUME)
 #include <arch/acpi.h>
 #endif
 #include <arch/early_variables.h>
 #include <bootstate.h>
 #include <cbmem.h>
 #include <console/console.h>
-#if IS_ENABLED(CONFIG_ARCH_X86)
+#if CONFIG(ARCH_X86)
 #include <pc80/mc146818rtc.h>
 #endif
 #include <bcd.h>
@@ -36,7 +36,7 @@
 #include "elog_internal.h"


-#if IS_ENABLED(CONFIG_ELOG_DEBUG)
+#if CONFIG(ELOG_DEBUG)
 #define elog_debug(STR...) printk(BIOS_DEBUG, STR)
 #else
 #define elog_debug(STR...)
@@ -207,7 +207,7 @@ static void elog_debug_dump_buffer(const char *msg)
 	struct region_device *rdev;
 	void *buffer;

-	if (!IS_ENABLED(CONFIG_ELOG_DEBUG))
+	if (!CONFIG(ELOG_DEBUG))
 		return;

 	elog_debug(msg);
@@ -628,7 +628,7 @@ static inline u8 *elog_flash_offset_to_address(void)
 	struct elog_state *es = car_get_var_ptr(&g_elog_state);

 	/* Only support memory-mapped devices. */
-	if (!IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED))
+	if (!CONFIG(BOOT_DEVICE_MEMORY_MAPPED))
 		return NULL;

 	if (!region_device_sz(&es->nv_dev))
@@ -651,7 +651,7 @@ int elog_smbios_write_type15(unsigned long *current, int handle)
 	struct elog_state *es = car_get_var_ptr(&g_elog_state);
 	size_t elog_size = region_device_sz(&es->nv_dev);

-	if (IS_ENABLED(CONFIG_ELOG_CBMEM)) {
+	if (CONFIG(ELOG_CBMEM)) {
 		/* Save event log buffer into CBMEM for the OS to read */
 		void *cbmem = cbmem_add(CBMEM_ID_ELOG, elog_size);
 		if (cbmem)
@@ -790,7 +790,7 @@ static bool elog_do_add_boot_count(void)
 	if (ENV_SMM)
 		return false;

-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#if CONFIG(HAVE_ACPI_RESUME)
 	return !acpi_is_wakeup_s3();
 #else
 	return true;
@@ -802,9 +802,9 @@ static void ramstage_elog_add_boot_count(void)
 	if (elog_do_add_boot_count()) {
 		elog_add_event_dword(ELOG_TYPE_BOOT, boot_count_read());

-#if IS_ENABLED(CONFIG_ARCH_X86)
+#if CONFIG(ARCH_X86)
 		/* Check and log POST codes from previous boot */
-		if (IS_ENABLED(CONFIG_CMOS_POST))
+		if (CONFIG(CMOS_POST))
 			cmos_post_log();
 #endif
 	}
@@ -869,7 +869,7 @@ int elog_init(void)
 */
 static void elog_fill_timestamp(struct event_header *event)
 {
-#if IS_ENABLED(CONFIG_RTC)
+#if CONFIG(RTC)
 	struct rtc_time time;

 	rtc_get(&time);
--- a/src/drivers/emulation/qemu/bochs.c
+++ b/src/drivers/emulation/qemu/bochs.c
@@ -135,9 +135,9 @@ static void bochs_init_text_mode(struct device *dev)

 static void bochs_init(struct device *dev)
 {
-	if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER))
+	if (CONFIG(LINEAR_FRAMEBUFFER))
 		bochs_init_linear_fb(dev);
-	else if (IS_ENABLED(CONFIG_VGA_TEXT_FRAMEBUFFER))
+	else if (CONFIG(VGA_TEXT_FRAMEBUFFER))
 		bochs_init_text_mode(dev);
 }

--- a/src/drivers/emulation/qemu/cirrus.c
+++ b/src/drivers/emulation/qemu/cirrus.c
@@ -338,9 +338,9 @@ static void cirrus_init_text_mode(struct device *dev)

 static void cirrus_init(struct device *dev)
 {
-	if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER))
+	if (CONFIG(LINEAR_FRAMEBUFFER))
 		cirrus_init_linear_fb(dev);
-	else if (IS_ENABLED(CONFIG_VGA_TEXT_FRAMEBUFFER))
+	else if (CONFIG(VGA_TEXT_FRAMEBUFFER))
 		cirrus_init_text_mode(dev);
 }

--- a/src/drivers/generic/adau7002/adau7002.c
+++ b/src/drivers/generic/adau7002/adau7002.c
@@ -22,7 +22,7 @@
 #include <string.h>
 #include "chip.h"

-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)

 #define ADAU7002_ACPI_NAME	"ADAU"
 #define ADAU7002_ACPI_HID	"ADAU7002"
@@ -71,7 +71,7 @@ static struct device_operations adau7002_ops = {
 	.read_resources			= DEVICE_NOOP,
 	.set_resources			= DEVICE_NOOP,
 	.enable_resources		= DEVICE_NOOP,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name			= adau7002_acpi_name,
 	.acpi_fill_ssdt_generator	= adau7002_fill_ssdt,
 #endif
--- a/src/drivers/generic/generic/chip.h
+++ b/src/drivers/generic/generic/chip.h
@@ -16,7 +16,7 @@
 #ifndef __GENERIC_GENERIC_CHIP_H__
 #define __GENERIC_GENERIC_CHIP_H__

-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)

 #include <arch/acpi_device.h>

--- a/src/drivers/generic/max98357a/max98357a.c
+++ b/src/drivers/generic/max98357a/max98357a.c
@@ -23,7 +23,7 @@
 #include <string.h>
 #include "chip.h"

-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)

 #define MAX98357A_ACPI_NAME	"MAXM"
 #define MAX98357A_ACPI_HID	"MX98357A"
@@ -76,7 +76,7 @@ static struct device_operations max98357a_ops = {
 	.read_resources		  = DEVICE_NOOP,
 	.set_resources		  = DEVICE_NOOP,
 	.enable_resources	  = DEVICE_NOOP,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name                = max98357a_acpi_name,
 	.acpi_fill_ssdt_generator = max98357a_fill_ssdt,
 #endif
--- a/src/drivers/i2c/da7219/da7219.c
+++ b/src/drivers/i2c/da7219/da7219.c
@@ -24,7 +24,7 @@
 #include <string.h>
 #include "chip.h"

-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)

 #define DA7219_ACPI_NAME	"DLG7"
 #define DA7219_ACPI_HID		"DLGS7219"
@@ -113,7 +113,7 @@ static struct device_operations da7219_ops = {
 	.read_resources		  = DEVICE_NOOP,
 	.set_resources		  = DEVICE_NOOP,
 	.enable_resources	  = DEVICE_NOOP,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name		  = da7219_acpi_name,
 	.acpi_fill_ssdt_generator = da7219_fill_ssdt,
 #endif
--- a/src/drivers/i2c/designware/dw_i2c.c
+++ b/src/drivers/i2c/designware/dw_i2c.c
@@ -377,7 +377,7 @@ static int _dw_i2c_transfer(unsigned int bus, const struct i2c_msg *segments,

 	/* Process each segment */
 	while (count--) {
-		if (IS_ENABLED(CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG)) {
+		if (CONFIG(DRIVERS_I2C_DESIGNWARE_DEBUG)) {
 			printk(BIOS_DEBUG, "i2c %u:%02x %s %d bytes : ",
 			       bus, segments->slave,
 			       (segments->flags & I2C_M_RD) ? "R" : "W",
@@ -401,7 +401,7 @@ static int _dw_i2c_transfer(unsigned int bus, const struct i2c_msg *segments,
 			}
 		}

-		if (IS_ENABLED(CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG)) {
+		if (CONFIG(DRIVERS_I2C_DESIGNWARE_DEBUG)) {
 			int j;
 			for (j = 0; j < segments->len; j++)
 				printk(BIOS_DEBUG, "%02x ", segments->buf[j]);
--- a/src/drivers/i2c/designware/dw_i2c.h
+++ b/src/drivers/i2c/designware/dw_i2c.h
@@ -20,7 +20,7 @@
 #include <device/i2c.h>
 #include <stdint.h>

-#if IS_ENABLED(CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG)
+#if CONFIG(DRIVERS_I2C_DESIGNWARE_DEBUG)
 #define DW_I2C_DEBUG BIOS_DEBUG

 #else
--- a/src/drivers/i2c/generic/generic.c
+++ b/src/drivers/i2c/generic/generic.c
@@ -24,7 +24,7 @@
 #include <string.h>
 #include "chip.h"

-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)

 static bool i2c_generic_add_gpios_to_crs(struct drivers_i2c_generic_config *cfg)
 {
@@ -192,7 +192,7 @@ static struct device_operations i2c_generic_ops = {
 	.read_resources		  = DEVICE_NOOP,
 	.set_resources		  = DEVICE_NOOP,
 	.enable_resources	  = DEVICE_NOOP,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name		  = i2c_generic_acpi_name,
 	.acpi_fill_ssdt_generator = i2c_generic_fill_ssdt_generator,
 #endif
--- a/src/drivers/i2c/hid/hid.c
+++ b/src/drivers/i2c/hid/hid.c
@@ -19,7 +19,7 @@
 #include <string.h>
 #include "chip.h"

-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 static void i2c_hid_fill_dsm(struct device *dev)
 {
 	struct drivers_i2c_hid_config *config = dev->chip_info;
@@ -50,7 +50,7 @@ static struct device_operations i2c_hid_ops = {
 	.read_resources		  = DEVICE_NOOP,
 	.set_resources		  = DEVICE_NOOP,
 	.enable_resources	  = DEVICE_NOOP,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name		  = i2c_hid_acpi_name,
 	.acpi_fill_ssdt_generator = i2c_hid_fill_ssdt_generator,
 #endif
--- a/src/drivers/i2c/nau8825/nau8825.c
+++ b/src/drivers/i2c/nau8825/nau8825.c
@@ -24,7 +24,7 @@
 #include <string.h>
 #include "chip.h"

-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)

 #define NAU8825_ACPI_NAME	"NAU8"
 #define NAU8825_ACPI_HID	"10508825"
@@ -102,7 +102,7 @@ static struct device_operations nau8825_ops = {
 	.read_resources		  = DEVICE_NOOP,
 	.set_resources		  = DEVICE_NOOP,
 	.enable_resources	  = DEVICE_NOOP,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name                = nau8825_acpi_name,
 	.acpi_fill_ssdt_generator = nau8825_fill_ssdt,
 #endif
--- a/src/drivers/i2c/tpm/tis.c
+++ b/src/drivers/i2c/tpm/tis.c
@@ -143,7 +143,7 @@ int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size,
 	ASSERT(sbuf_size >= 10);

 	/* Display the TPM command */
-	if (IS_ENABLED(CONFIG_DRIVER_TPM_DISPLAY_TIS_BYTES)) {
+	if (CONFIG(DRIVER_TPM_DISPLAY_TIS_BYTES)) {
 		printk(BIOS_DEBUG, "TPM Command: 0x%08x\n",
 			read_at_be32(sendbuf, sizeof(uint16_t)
 				+ sizeof(uint32_t)));
@@ -165,7 +165,7 @@ int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size,
 	*rbuf_len = len;

 	/* Display the TPM response */
-	if (IS_ENABLED(CONFIG_DRIVER_TPM_DISPLAY_TIS_BYTES)) {
+	if (CONFIG(DRIVER_TPM_DISPLAY_TIS_BYTES)) {
 		printk(BIOS_DEBUG, "TPM Response: 0x%08x\n",
 			read_at_be32(recvbuf, sizeof(uint16_t)
 				+ sizeof(uint32_t)));
--- a/src/drivers/i2c/tpm/tis_atmel.c
+++ b/src/drivers/i2c/tpm/tis_atmel.c
@@ -61,7 +61,7 @@ int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size,
 	struct stopwatch sw;

 	ASSERT(sbuf_size >= 10);
-	if (IS_ENABLED(CONFIG_DRIVER_TPM_DISPLAY_TIS_BYTES)) {
+	if (CONFIG(DRIVER_TPM_DISPLAY_TIS_BYTES)) {
 		/* Display the TPM command */
 		if (sbuf_size >= 10)
 			printk(BIOS_DEBUG, "TPM Command: 0x%08x\n",
@@ -106,7 +106,7 @@ int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size,
 	/* Determine if there is additional response data */
 	if (recv_bytes > hdr_bytes) {
 		/* Display the TPM response */
-		if (IS_ENABLED(CONFIG_DRIVER_TPM_DISPLAY_TIS_BYTES))
+		if (CONFIG(DRIVER_TPM_DISPLAY_TIS_BYTES))
 			hexdump(recvbuf, hdr_bytes);

 		/* Read the full TPM response */
@@ -120,7 +120,7 @@ int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size,
 	*rbuf_len = status;

 	/* Display the TPM response */
-	if (IS_ENABLED(CONFIG_DRIVER_TPM_DISPLAY_TIS_BYTES)) {
+	if (CONFIG(DRIVER_TPM_DISPLAY_TIS_BYTES)) {
 		printk(BIOS_DEBUG, "TPM Response: 0x%08x\n",
 			read_at_be32(recvbuf, sizeof(uint16_t)
 				+ sizeof(uint32_t)));
--- a/src/drivers/i2c/w83795/w83795.c
+++ b/src/drivers/i2c/w83795/w83795.c
@@ -142,14 +142,14 @@ static void w83795_init(struct device *dev, w83795_fan_mode_t mode, u8 dts_src)
 	uint8_t val;
 	uint16_t limit_value;

-#if IS_ENABLED(CONFIG_SMBUS_HAS_AUX_CHANNELS)
+#if CONFIG(SMBUS_HAS_AUX_CHANNELS)
 	uint8_t smbus_aux_channel_prev = smbus_get_current_channel();
 	smbus_switch_to_channel(config->smbus_aux);
 	printk(BIOS_DEBUG, "Set SMBUS controller to channel %d\n", config->smbus_aux);
 #endif

 	if (smbus_read_byte(dev, 0x00) < 0) {
-#if IS_ENABLED(CONFIG_SMBUS_HAS_AUX_CHANNELS)
+#if CONFIG(SMBUS_HAS_AUX_CHANNELS)
 		/* Restore SMBUS channel setting */
 		smbus_switch_to_channel(smbus_aux_channel_prev);
 		printk(BIOS_DEBUG, "Set SMBUS controller to channel %d\n", smbus_aux_channel_prev);
@@ -346,7 +346,7 @@ static void w83795_init(struct device *dev, w83795_fan_mode_t mode, u8 dts_src)
 	val |= W83795_REG_CONFIG_START;
 	w83795_write(dev, W83795_REG_CONFIG, val);

-#if IS_ENABLED(CONFIG_SMBUS_HAS_AUX_CHANNELS)
+#if CONFIG(SMBUS_HAS_AUX_CHANNELS)
 	/* Restore SMBUS channel setting */
 	smbus_switch_to_channel(smbus_aux_channel_prev);
 	printk(BIOS_DEBUG, "Set SMBUS controller to channel %d\n", smbus_aux_channel_prev);
--- a/src/drivers/intel/fsp1_0/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_0/cache_as_ram.inc
@@ -95,7 +95,7 @@ before_romstage:
 	jmp	.Lhlt

 .Lhlt:
-#if IS_ENABLED(CONFIG_POST_IO)
+#if CONFIG(POST_IO)
 	outb	%al, $CONFIG_POST_IO_PORT
 #endif
 	hlt
--- a/src/drivers/intel/fsp1_0/fastboot_cache.c
+++ b/src/drivers/intel/fsp1_0/fastboot_cache.c
@@ -57,7 +57,7 @@ static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)
 {
 	size_t region_size;

-	if (IS_ENABLED(CONFIG_MRC_CACHE_FMAP)) {
+	if (CONFIG(MRC_CACHE_FMAP)) {
 		struct region_device rdev;
 		if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev) == 0) {
 			*mrc_region_ptr = rdev_mmap_full(&rdev);
--- a/src/drivers/intel/fsp1_0/fsp_util.c
+++ b/src/drivers/intel/fsp1_0/fsp_util.c
@@ -72,19 +72,19 @@ void __noreturn fsp_early_init (FSP_INFO_HEADER *fsp_ptr)
 	FSP_FSP_INIT FspInitApi;
 	FSP_INIT_PARAMS FspInitParams;
 	FSP_INIT_RT_BUFFER FspRtBuffer;
-#if IS_ENABLED(CONFIG_FSP_USES_UPD)
+#if CONFIG(FSP_USES_UPD)
 	UPD_DATA_REGION fsp_upd_data;
 #endif

 	/* Load microcode before RAM init */
-	if (IS_ENABLED(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS))
+	if (CONFIG(SUPPORT_CPU_UCODE_IN_CBFS))
 		intel_update_microcode_from_cbfs();

 	memset((void *)&FspRtBuffer, 0, sizeof(FSP_INIT_RT_BUFFER));
 	FspRtBuffer.Common.StackTop = (u32 *)CONFIG_RAMTOP;
 	FspInitParams.NvsBufferPtr = NULL;

-#if IS_ENABLED(CONFIG_FSP_USES_UPD)
+#if CONFIG(FSP_USES_UPD)
 	FspRtBuffer.Common.UpdDataRgnPtr = &fsp_upd_data;
 #endif
 	FspInitParams.RtBufferPtr = (FSP_INIT_RT_BUFFER *)&FspRtBuffer;
@@ -238,7 +238,7 @@ void print_fsp_info(void) {
 }


-#if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
+#if CONFIG(ENABLE_MRC_CACHE)
 /**
 *  Save the FSP memory HOB (mrc data) to the MRC area in CBMEM
 */
@@ -308,7 +308,7 @@ static void find_fsp_hob_update_mrc(void *unused)
 		/* 0x0000: Print all types */
 		print_hob_type_structure(0x000, FspHobListPtr);

-	#if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
+	#if CONFIG(ENABLE_MRC_CACHE)
 		if (save_mrc_data(FspHobListPtr))
 			update_mrc_cache(NULL);
 		else
--- a/src/drivers/intel/fsp1_0/fsp_util.h
+++ b/src/drivers/intel/fsp1_0/fsp_util.h
@@ -19,7 +19,7 @@
 #include <chipset_fsp_util.h>
 #include "fsp_values.h"

-#if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
+#if CONFIG(ENABLE_MRC_CACHE)
 int save_mrc_data(void *hob_start);
 void *find_and_set_fastboot_cache(void);
 #endif
@@ -61,7 +61,7 @@ void printguid(EFI_GUID *guid);
 #define EFI_HOB_TYPE_HANDOFF		0x0001
 #define EFI_HOB_TYPE_MEMORY_POOL	0x0007

-#if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
+#if CONFIG(ENABLE_MRC_CACHE)
 #define MRC_DATA_ALIGN			0x1000
 #define MRC_DATA_SIGNATURE		(('M'<<0)|('R'<<8)|('C'<<16)|('D'<<24))

--- a/src/drivers/intel/fsp1_1/after_raminit.S
+++ b/src/drivers/intel/fsp1_1/after_raminit.S
@@ -30,7 +30,7 @@
 	/* Switch to the stack in RAM */
 	movl	%eax, %esp

-#if IS_ENABLED(CONFIG_SKIP_FSP_CAR)
+#if CONFIG(SKIP_FSP_CAR)

 	/* chipset_teardown_car() is expected to disable cache-as-ram. */
 	call	chipset_teardown_car
@@ -87,7 +87,7 @@
 	 *   +0: Number of variable MTRRs to clear
 	 */

-#if IS_ENABLED(CONFIG_SOC_SETS_MSRS)
+#if CONFIG(SOC_SETS_MSRS)
 	push	%esp
 	call	soc_set_mtrrs

@@ -147,7 +147,7 @@

 	post_code(0x3a)

-#if IS_ENABLED(CONFIG_SOC_SETS_MSRS)
+#if CONFIG(SOC_SETS_MSRS)
 	call	soc_enable_mtrrs
 #else
 	/* Enable MTRR. */
--- a/src/drivers/intel/fsp1_1/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_1/cache_as_ram.inc
@@ -189,7 +189,7 @@ halt2:

 .Lhlt:
 	xchg	%al, %ah
-#if IS_ENABLED(CONFIG_POST_IO)
+#if CONFIG(POST_IO)
 	outb	%al, $CONFIG_POST_IO_PORT
 #else
 	post_code(POST_DEAD_CODE)
--- a/src/drivers/intel/fsp1_1/fsp_util.c
+++ b/src/drivers/intel/fsp1_1/fsp_util.c
@@ -102,7 +102,7 @@ void print_fsp_info(FSP_INFO_HEADER *fsp_header)
 			(u8)((fsp_header->ImageRevision >> 16) & 0xff),
 			(u8)((fsp_header->ImageRevision >> 8) & 0xff),
 			(u8)(fsp_header->ImageRevision  & 0xff));
-#if IS_ENABLED(CONFIG_DISPLAY_FSP_ENTRY_POINTS)
+#if CONFIG(DISPLAY_FSP_ENTRY_POINTS)
 	printk(BIOS_SPEW, "FSP Entry Points:\n");
 	printk(BIOS_SPEW, "    0x%p: Image Base\n", fsp_base);
 	printk(BIOS_SPEW, "    0x%p: TempRamInit\n",
--- a/src/drivers/intel/fsp1_1/raminit.c
+++ b/src/drivers/intel/fsp1_1/raminit.c
@@ -51,7 +51,7 @@ void raminit(struct romstage_params *params)
 	VPD_DATA_REGION *vpd_ptr;
 	UPD_DATA_REGION *upd_ptr;
 	int fsp_verification_failure = 0;
-#if IS_ENABLED(CONFIG_DISPLAY_HOBS)
+#if CONFIG(DISPLAY_HOBS)
 	unsigned long int data;
 	EFI_PEI_HOB_POINTERS hob_ptr;
 #endif
@@ -101,13 +101,13 @@ void raminit(struct romstage_params *params)
 	soc_memory_init_params(params, &memory_init_params);
 	mainboard_memory_init_params(params, &memory_init_params);

-	if (IS_ENABLED(CONFIG_MMA))
+	if (CONFIG(MMA))
 		setup_mma(&memory_init_params);

 	post_code(POST_MEM_PREINIT_PREP_END);

 	/* Display the UPD data */
-	if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
+	if (CONFIG(DISPLAY_UPD_DATA))
 		soc_display_memory_init_params(original_params,
 			&memory_init_params);

@@ -146,7 +146,7 @@ void raminit(struct romstage_params *params)
 	}

 	/* Display SMM area */
-#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
+#if CONFIG(HAVE_SMI_HANDLER)
 	char *smm_base;
 	size_t smm_size;

@@ -162,7 +162,7 @@ void raminit(struct romstage_params *params)
 			fsp_reserved_bytes);
 	} else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
 		fsp_reserved_bytes)) {
-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#if CONFIG(HAVE_ACPI_RESUME)
 		printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n");
 		/* Failed S3 resume, reset to come up cleanly */
 		/* FIXME: A "system" reset is likely enough: */
@@ -194,7 +194,7 @@ void raminit(struct romstage_params *params)
 			memory_info_hob);
 	}

-#if IS_ENABLED(CONFIG_DISPLAY_HOBS)
+#if CONFIG(DISPLAY_HOBS)
 	if (hob_list_ptr == NULL)
 		die("ERROR - HOB pointer is NULL!\n");

@@ -266,7 +266,7 @@ void raminit(struct romstage_params *params)
 			(unsigned int)fsp_reserved_memory_area))) {
 		fsp_verification_failure = 1;
 		printk(BIOS_DEBUG, "ERROR - Reserving FSP memory area!\n");
-#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
+#if CONFIG(HAVE_SMI_HANDLER)
 		if (cbmem_root != NULL) {
 			size_t delta_bytes = (unsigned int)smm_base
 				- cbmem_root->PhysicalStart
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -55,7 +55,7 @@ static void display_hob_info(FSP_INFO_HEADER *fsp_info_header)
 	int missing_hob = 0;
 	void *hob_list_ptr = get_hob_list();

-	if (!IS_ENABLED(CONFIG_DISPLAY_HOBS))
+	if (!CONFIG(DISPLAY_HOBS))
 		return;

 	/* Verify the HOBs */
@@ -117,12 +117,12 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
 	soc_silicon_init_params(&silicon_init_params);

 	/* Locate VBT and pass to FSP GOP */
-	if (IS_ENABLED(CONFIG_RUN_FSP_GOP))
+	if (CONFIG(RUN_FSP_GOP))
 		load_vbt(is_s3_wakeup, &silicon_init_params);
 	mainboard_silicon_init_params(&silicon_init_params);

 	/* Display the UPD data */
-	if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
+	if (CONFIG(DISPLAY_UPD_DATA))
 		soc_display_silicon_init_params(original_params,
 			&silicon_init_params);

@@ -139,7 +139,7 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
 	printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);

 	/* Mark graphics init done after SiliconInit if VBT was provided */
-#if IS_ENABLED(CONFIG_RUN_FSP_GOP)
+#if CONFIG(RUN_FSP_GOP)
 	/* GraphicsConfigPtr doesn't exist in Quark X1000's FSP, so this needs
 	 * to be #if'd out instead of using if (). */
 	if (silicon_init_params.GraphicsConfigPtr)
@@ -152,10 +152,10 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)

 static void fsp_cache_save(struct prog *fsp)
 {
-	if (IS_ENABLED(CONFIG_DISPLAY_SMM_MEMORY_MAP))
+	if (CONFIG(DISPLAY_SMM_MEMORY_MAP))
 		smm_memory_map();

-	if (IS_ENABLED(CONFIG_NO_STAGE_CACHE))
+	if (CONFIG(NO_STAGE_CACHE))
 		return;

 	printk(BIOS_DEBUG, "FSP: Saving binary in cache\n");
@@ -192,7 +192,7 @@ void fsp_load(void)
 	if (load_done)
 		return;

-	if (is_s3_wakeup && !IS_ENABLED(CONFIG_NO_STAGE_CACHE)) {
+	if (is_s3_wakeup && !CONFIG(NO_STAGE_CACHE)) {
 		printk(BIOS_DEBUG, "FSP: Loading binary from cache\n");
 		stage_cache_load_stage(STAGE_REFCODE, &fsp);
 	} else {
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -52,13 +52,13 @@ asmlinkage void *romstage_main(FSP_INFO_HEADER *fih)
 	timestamp_add_now(TS_START_ROMSTAGE);

 	/* Load microcode before RAM init */
-	if (IS_ENABLED(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS))
+	if (CONFIG(SUPPORT_CPU_UCODE_IN_CBFS))
 		intel_update_microcode_from_cbfs();

 	memset(&pei_data, 0, sizeof(pei_data));

 	/* Display parameters */
-	if (!IS_ENABLED(CONFIG_NO_MMCONF_SUPPORT))
+	if (!CONFIG(NO_MMCONF_SUPPORT))
 		printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n",
 			CONFIG_MMCONF_BASE_ADDRESS);
 	printk(BIOS_INFO, "Using FSP 1.1\n");
@@ -104,7 +104,7 @@ void romstage_common(struct romstage_params *params)
 	pei_data->boot_mode = params->power_state->prev_sleep_state;
 	s3wake = params->power_state->prev_sleep_state == ACPI_S3;

-	if (IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) && !s3wake)
+	if (CONFIG(ELOG_BOOT_COUNT) && !s3wake)
 		boot_count_increment();

 	/* Perform remaining SOC initialization */
@@ -119,7 +119,7 @@ void romstage_common(struct romstage_params *params)
 			/* Recovery mode does not use MRC cache */
 			printk(BIOS_DEBUG,
 			       "Recovery mode: not using MRC cache.\n");
-		} else if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)
+		} else if (CONFIG(CACHE_MRC_SETTINGS)
 			&& (!mrc_cache_get_current(MRC_TRAINING_DATA,
 							params->fsp_version,
 							&rdev))) {
@@ -128,7 +128,7 @@ void romstage_common(struct romstage_params *params)
 				region_device_sz(&rdev);
 			params->pei_data->saved_data = rdev_mmap_full(&rdev);
 			/* Assume boot device is memory mapped. */
-			assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED));
+			assert(CONFIG(BOOT_DEVICE_MEMORY_MAPPED));
 		} else if (params->pei_data->boot_mode == ACPI_S3) {
 			/* Waking from S3 and no cache. */
 			printk(BIOS_DEBUG,
@@ -146,7 +146,7 @@ void romstage_common(struct romstage_params *params)
 	timestamp_add_now(TS_AFTER_INITRAM);

 	/* Save MRC output */
-	if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) {
+	if (CONFIG(CACHE_MRC_SETTINGS)) {
 		printk(BIOS_DEBUG, "MRC data at %p %d bytes\n",
 			pei_data->data_to_save, pei_data->data_to_save_size);
 		if ((params->pei_data->boot_mode != ACPI_S3)
@@ -214,7 +214,7 @@ __weak void mainboard_save_dimm_info(
 	memory_info_hob = (FSP_SMBIOS_MEMORY_INFO *)(hob_ptr + 1);

 	/* Display the data in the FSP_SMBIOS_MEMORY_INFO HOB */
-	if (IS_ENABLED(CONFIG_DISPLAY_HOBS)) {
+	if (CONFIG(DISPLAY_HOBS)) {
 		printk(BIOS_DEBUG, "FSP_SMBIOS_MEMORY_INFO HOB\n");
 		printk(BIOS_DEBUG, "    0x%02x: Revision\n",
 			memory_info_hob->Revision);
--- a/src/drivers/intel/fsp1_1/stack.c
+++ b/src/drivers/intel/fsp1_1/stack.c
@@ -116,7 +116,7 @@ void *setup_stack_and_mtrrs(void)
 	slot = stack_push32(slot, aligned_ram | MTRR_TYPE_WRBACK);
 	num_mtrrs++;

-#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
+#if CONFIG(HAVE_SMI_HANDLER)
 	void *smm_base;
 	size_t smm_size;
 	uint32_t tseg_base;
--- a/src/drivers/intel/fsp1_1/vbt.c
+++ b/src/drivers/intel/fsp1_1/vbt.c
@@ -34,7 +34,7 @@ void load_vbt(uint8_t s3_resume, SILICON_INIT_UPD *params)
 		/* Get VBT data */
 		vbt_data = locate_vbt(&vbt_len);
 		if (vbt_data != NULL) {
-			if (IS_ENABLED(CONFIG_DISPLAY_VBT)) {
+			if (CONFIG(DISPLAY_VBT)) {
 				/* Display the vbt file contents */
 				printk(BIOS_DEBUG, "VBT Data:\n");
 				hexdump(vbt_data, vbt_len);
--- a/src/drivers/intel/fsp2_0/debug.c
+++ b/src/drivers/intel/fsp2_0/debug.c
@@ -31,11 +31,11 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
 	display_mtrrs();

 	/* Display the UPD values */
-	if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
+	if (CONFIG(DISPLAY_UPD_DATA))
 		fspm_display_upd_values(fspm_old_upd, fspm_new_upd);

 	/* Display the call entry point and parameters */
-	if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
+	if (!CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
 		return;
 	printk(BIOS_SPEW, "Calling FspMemoryInit: 0x%p\n", memory_init);
 	printk(BIOS_SPEW, "\t0x%p: raminit_upd\n", fspm_new_upd);
@@ -44,7 +44,7 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,

 void fsp_debug_after_memory_init(uint32_t status)
 {
-	if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
+	if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
 		printk(BIOS_SPEW, "FspMemoryInit returned 0x%08x\n", status);

 	if (status != FSP_SUCCESS)
@@ -55,9 +55,9 @@ void fsp_debug_after_memory_init(uint32_t status)
 		die("ERROR - HOB list pointer was not returned!\n");

 	/* Display and verify the HOBs */
-	if (IS_ENABLED(CONFIG_DISPLAY_HOBS))
+	if (CONFIG(DISPLAY_HOBS))
 		fsp_display_hobs();
-	if (IS_ENABLED(CONFIG_VERIFY_HOBS))
+	if (CONFIG(VERIFY_HOBS))
 		fsp_verify_memory_init_hobs();

 	display_mtrrs();
@@ -74,11 +74,11 @@ void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init,
 	display_mtrrs();

 	/* Display the UPD values */
-	if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
+	if (CONFIG(DISPLAY_UPD_DATA))
 		soc_display_fsps_upd_params(fsps_old_upd, fsps_new_upd);

 	/* Display the call to FSP SiliconInit */
-	if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
+	if (!CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
 		return;
 	printk(BIOS_SPEW, "Calling FspSiliconInit: 0x%p\n", silicon_init);
 	printk(BIOS_SPEW, "\t0x%p: upd\n", fsps_new_upd);
@@ -86,11 +86,11 @@ void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init,

 void fsp_debug_after_silicon_init(uint32_t status)
 {
-	if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
+	if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
 		printk(BIOS_SPEW, "FspSiliconInit returned 0x%08x\n", status);

 	/* Display the HOBs */
-	if (IS_ENABLED(CONFIG_DISPLAY_HOBS))
+	if (CONFIG(DISPLAY_HOBS))
 		fsp_display_hobs();

 	display_mtrrs();
@@ -104,7 +104,7 @@ void fsp_before_debug_notify(fsp_notify_fn notify,
 	const struct fsp_notify_params *notify_params)
 {
 	/* Display the call to FspNotify */
-	if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
+	if (!CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
 		return;
 	printk(BIOS_SPEW, "0x%08x: notify_params->phase\n",
 		notify_params->phase);
@@ -114,11 +114,11 @@ void fsp_before_debug_notify(fsp_notify_fn notify,

 void fsp_debug_after_notify(uint32_t status)
 {
-	if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
+	if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
 		printk(BIOS_SPEW, "FspNotify returned 0x%08x\n", status);

 	/* Display the HOBs */
-	if (IS_ENABLED(CONFIG_DISPLAY_HOBS))
+	if (CONFIG(DISPLAY_HOBS))
 		fsp_display_hobs();

 	display_mtrrs();
--- a/src/drivers/intel/fsp2_0/hand_off_block.c
+++ b/src/drivers/intel/fsp2_0/hand_off_block.c
@@ -219,7 +219,7 @@ const void *fsp_find_extension_hob_by_guid(const uint8_t *guid, size_t *size)

 static void display_fsp_version_info_hob(const void *hob, size_t size)
 {
-#if IS_ENABLED(CONFIG_DISPLAY_FSP_VERSION_INFO)
+#if CONFIG(DISPLAY_FSP_VERSION_INFO)
 	const FIRMWARE_VERSION_INFO *fvi;
 	const FIRMWARE_VERSION_INFO_HOB *fvih =
 			(FIRMWARE_VERSION_INFO_HOB *)hob;
--- a/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
@@ -26,7 +26,7 @@
 #include <Base.h>
 #include <FspmUpd.h>
 #include <FspsUpd.h>
-#if IS_ENABLED(CONFIG_DISPLAY_FSP_VERSION_INFO)
+#if CONFIG(DISPLAY_FSP_VERSION_INFO)
 #include <FirmwareVersionInfoHob.h>
 #endif

--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -38,7 +38,7 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version)
 	size_t  mrc_data_size;
 	const void *mrc_data;

-	if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS) || s3wake)
+	if (!CONFIG(CACHE_MRC_SETTINGS) || s3wake)
 		return;

 	mrc_data = fsp_find_nv_storage_data(&mrc_data_size);
@@ -57,7 +57,7 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version)
 				mrc_data_size) < 0)
 		printk(BIOS_ERR, "Failed to stash MRC data\n");

-	if (IS_ENABLED(CONFIG_FSP2_0_USES_TPM_MRC_HASH))
+	if (CONFIG(FSP2_0_USES_TPM_MRC_HASH))
 		mrc_cache_update_hash(mrc_data, mrc_data_size);
 }

@@ -74,7 +74,7 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
 			range_entry_size(&fsp_mem));
 	} else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
 				range_entry_size(&fsp_mem))) {
-		if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
+		if (CONFIG(HAVE_ACPI_RESUME)) {
 			printk(BIOS_ERR,
 				"Failed to recover CBMEM in S3 resume.\n");
 			/* Failed S3 resume, reset to come up cleanly */
@@ -97,8 +97,8 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
 	 * Initialize the TPM, unless the TPM was already initialized
 	 * in verstage and used to verify romstage.
 	 */
-	if ((IS_ENABLED(CONFIG_TPM1) || IS_ENABLED(CONFIG_TPM2)) &&
-	    !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK))
+	if ((CONFIG(TPM1) || CONFIG(TPM2)) &&
+	    !CONFIG(VBOOT_STARTS_IN_BOOTBLOCK))
 		tpm_setup(s3wake);
 }

@@ -109,7 +109,7 @@ static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, uint32_t fsp_version)

 	arch_upd->NvsBufferPtr = NULL;

-	if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS))
+	if (!CONFIG(CACHE_MRC_SETTINGS))
 		return;

 	/*
@@ -118,7 +118,7 @@ static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, uint32_t fsp_version)
 	 * 2. Memory retrain switch is set.
 	 */
 	if (vboot_recovery_mode_enabled()) {
-		if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE))
+		if (!CONFIG(HAS_RECOVERY_MRC_CACHE))
 			return;
 		if (vboot_recovery_mode_memory_retrain())
 			return;
@@ -128,13 +128,13 @@ static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, uint32_t fsp_version)
 		return;

 	/* Assume boot device is memory mapped. */
-	assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED));
+	assert(CONFIG(BOOT_DEVICE_MEMORY_MAPPED));
 	data = rdev_mmap_full(&rdev);

 	if (data == NULL)
 		return;

-	if (IS_ENABLED(CONFIG_FSP2_0_USES_TPM_MRC_HASH) &&
+	if (CONFIG(FSP2_0_USES_TPM_MRC_HASH) &&
 	    !mrc_cache_verify_hash(data, region_device_sz(&rdev)))
 		return;

@@ -174,7 +174,7 @@ static enum cb_err setup_fsp_stack_frame(FSPM_ARCH_UPD *arch_upd,
 	 * setting up seprate stack frame. FSP 2.1 would not relocate stack
 	 * top and does not reinitialize stack pointer.
 	 */
-	if (IS_ENABLED(CONFIG_FSP_USES_CB_STACK)) {
+	if (CONFIG(FSP_USES_CB_STACK)) {
 		arch_upd->StackBase = (void *)_car_stack_end;
 		arch_upd->StackSize = CONFIG_DCACHE_BSP_STACK_SIZE;
 		return CB_SUCCESS;
@@ -254,7 +254,7 @@ static uint32_t fsp_memory_settings_version(const struct fsp_header *hdr)
 	/* Use the full FSP version by default. */
 	uint32_t ver = hdr->fsp_revision;

-	if (!IS_ENABLED(CONFIG_FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS))
+	if (!CONFIG(FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS))
 		return ver;

 	ver &= ~0xff;
@@ -298,7 +298,7 @@ static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake,
 	/* Give SoC and mainboard a chance to update the UPD */
 	platform_fsp_memory_init_params_cb(&fspm_upd, fsp_version);

-	if (IS_ENABLED(CONFIG_MMA))
+	if (CONFIG(MMA))
 		setup_mma(&fspm_upd.FspmConfig);

 	post_code(POST_MEM_PREINIT_PREP_END);
@@ -383,7 +383,7 @@ void fsp_memory_init(bool s3wake)
 	struct memranges memmap;
 	struct range_entry freeranges[2];

-	if (IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) && !s3wake)
+	if (CONFIG(ELOG_BOOT_COUNT) && !s3wake)
 		boot_count_increment();

 	if (cbfs_boot_locate(&file_desc, name, NULL)) {
@@ -399,7 +399,7 @@ void fsp_memory_init(bool s3wake)
 		_car_relocatable_data_end - _car_region_start, 0);
 	memranges_insert(&memmap, (uintptr_t)_program, REGION_SIZE(program), 0);

-	if (!IS_ENABLED(CONFIG_FSP_M_XIP))
+	if (!CONFIG(FSP_M_XIP))
 		status = load_fspm_mem(&hdr, &file_data, &memmap);
 	else
 		status = load_fspm_xip(&hdr, &file_data);
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -77,7 +77,7 @@ void fsps_load(bool s3wake)
 	if (load_done)
 		return;

-	if (s3wake && !IS_ENABLED(CONFIG_NO_STAGE_CACHE)) {
+	if (s3wake && !CONFIG(NO_STAGE_CACHE)) {
 		printk(BIOS_DEBUG, "Loading FSPS from stage_cache\n");
 		stage_cache_load_stage(STAGE_REFCODE, &fsps);
 		if (fsp_validate_component(hdr, prog_rdev(&fsps)) != CB_SUCCESS)
--- a/src/drivers/intel/fsp2_0/util.c
+++ b/src/drivers/intel/fsp2_0/util.c
@@ -80,7 +80,7 @@ enum cb_err fsp_validate_component(struct fsp_header *hdr,

 	rdev_munmap(rdev, membase);

-	if (IS_ENABLED(CONFIG_DISPLAY_FSP_HEADER))
+	if (CONFIG(DISPLAY_FSP_HEADER))
 		fsp_print_header_info(hdr);

 	/* Check if size specified in the header matches the cbfs file size */
--- a/src/drivers/intel/gma/int15.h
+++ b/src/drivers/intel/gma/int15.h
@@ -26,7 +26,7 @@ enum {
 };


-#if IS_ENABLED(CONFIG_VGA_ROM_RUN)
+#if CONFIG(VGA_ROM_RUN)
 /* Install custom int15 handler for VGA OPROM */
 void install_intel_vga_int15_handler(int active_lfp, int pfit, int display, int panel_type);
 #else
--- a/src/drivers/intel/gma/opregion.c
+++ b/src/drivers/intel/gma/opregion.c
@@ -91,7 +91,7 @@ void intel_gma_opregion_register(uintptr_t opregion)
 	 * Atom-based platforms use a combined SMI/SCI register,
 	 * whereas non-Atom platforms use a separate SCI register.
 	 */
-	if (IS_ENABLED(CONFIG_INTEL_GMA_SWSMISCI))
+	if (CONFIG(INTEL_GMA_SWSMISCI))
 		sci_reg = SWSMISCI;
 	else
 		sci_reg = SWSCI;
--- a/src/drivers/intel/gma/vbt.c
+++ b/src/drivers/intel/gma/vbt.c
@@ -60,7 +60,7 @@ static size_t generate_vbt(const struct i915_gpu_controller_info *const conf,
 	genfeat->flexaim = 1;
 	genfeat->download_ext_vbt = 1;
 	genfeat->enable_ssc = conf->use_spread_spectrum_clock;
-	genfeat->ssc_freq = IS_ENABLED(CONFIG_INTEL_GMA_SSC_ALTERNATE_REF);
+	genfeat->ssc_freq = CONFIG(INTEL_GMA_SSC_ALTERNATE_REF);
 	genfeat->rsvd10 = 0x4;
 	genfeat->legacy_monitor_detect = 1;
 	genfeat->int_crt_support = 1;
--- a/src/drivers/intel/wifi/wifi.c
+++ b/src/drivers/intel/wifi/wifi.c
@@ -32,7 +32,7 @@
 #define PMCS_DR 0xcc
 #define PME_STS (1 << 15)

-#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES)
+#if CONFIG(GENERATE_SMBIOS_TABLES)
 static int smbios_write_wifi(struct device *dev, int *handle,
 			     unsigned long *current)
 {
@@ -71,7 +71,7 @@ int get_wifi_sar_limits(struct wifi_sar_limits *sar_limits)
 	return -1;
 }

-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 static void emit_sar_acpi_structures(void)
 {
 	int i, j, package_size;
@@ -139,7 +139,7 @@ static void emit_sar_acpi_structures(void)
 	acpigen_pop_len();


-	if (!IS_ENABLED(CONFIG_GEO_SAR_ENABLE))
+	if (!CONFIG(GEO_SAR_ENABLE))
 		return;

 	/*
@@ -219,7 +219,7 @@ static void intel_wifi_fill_ssdt(struct device *dev)
 		acpigen_write_PRW(config->wake, 3);

 	/* Fill regulatory domain structure */
-	if (IS_ENABLED(CONFIG_HAVE_REGULATORY_DOMAIN)) {
+	if (CONFIG(HAVE_REGULATORY_DOMAIN)) {
 		/*
 		 * Name ("WRDD", Package () {
 		 *   WRDD_REVISION, // Revision
@@ -240,7 +240,7 @@ static void intel_wifi_fill_ssdt(struct device *dev)
 	}

 	/* Fill Wifi sar related ACPI structures */
-	if (IS_ENABLED(CONFIG_USE_SAR))
+	if (CONFIG(USE_SAR))
 		emit_sar_acpi_structures();

 	acpigen_pop_len(); /* Device */
@@ -260,7 +260,7 @@ static void wifi_pci_dev_init(struct device *dev)
 {
 	pci_dev_init(dev);

-	if (IS_ENABLED(CONFIG_ELOG)) {
+	if (CONFIG(ELOG)) {
 		uint32_t val;
 		val = pci_read_config16(dev, PMCS_DR);
 		if (val & PME_STS)
@@ -277,11 +277,11 @@ struct device_operations device_ops = {
 	.set_resources            = pci_dev_set_resources,
 	.enable_resources         = pci_dev_enable_resources,
 	.init                     = wifi_pci_dev_init,
-#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES)
+#if CONFIG(GENERATE_SMBIOS_TABLES)
 	.get_smbios_data          = smbios_write_wifi,
 #endif
 	.ops_pci                  = &pci_ops,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name                = intel_wifi_acpi_name,
 	.acpi_fill_ssdt_generator = intel_wifi_fill_ssdt,
 #endif
--- a/src/drivers/lenovo/wacom.c
+++ b/src/drivers/lenovo/wacom.c
@@ -49,12 +49,12 @@ drivers_lenovo_is_wacom_present(void)
 	if (result != -1)
 		return result;

-	if (IS_ENABLED(CONFIG_DIGITIZER_PRESENT)) {
+	if (CONFIG(DIGITIZER_PRESENT)) {
 		printk (BIOS_INFO, "Digitizer state forced as present\n");
 		return (result = 1);
 	}

-	if (IS_ENABLED(CONFIG_DIGITIZER_ABSENT)) {
+	if (CONFIG(DIGITIZER_ABSENT)) {
 		printk (BIOS_INFO, "Digitizer state forced as absent\n");
 		return (result = 0);
 	}
--- a/src/drivers/mrc_cache/mrc_cache.c
+++ b/src/drivers/mrc_cache/mrc_cache.c
@@ -65,7 +65,7 @@ static const struct cache_region recovery_training = {
 	.cbmem_id = CBMEM_ID_MRCDATA,
 	.type = MRC_TRAINING_DATA,
 	.elog_slot = ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY,
-#if IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE)
+#if CONFIG(HAS_RECOVERY_MRC_CACHE)
 	.flags = RECOVERY_FLAG,
 #else
 	.flags = 0,
@@ -431,10 +431,10 @@ static int nvm_is_write_protected(void)
 	u8 wp_gpio;
 	u8 wp_spi;

-	if (!IS_ENABLED(CONFIG_CHROMEOS))
+	if (!CONFIG(CHROMEOS))
 		return 0;

-	if (!IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH))
+	if (!CONFIG(BOOT_DEVICE_SPI_FLASH))
 		return 0;

 	/* Read Write Protect GPIO if available */
@@ -458,10 +458,10 @@ static int nvm_protect(const struct region *r)
 {
 	const struct spi_flash *flash = boot_device_spi_flash();

-	if (!IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT))
+	if (!CONFIG(MRC_SETTINGS_PROTECT))
 		return 0;

-	if (!IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH))
+	if (!CONFIG(BOOT_DEVICE_SPI_FLASH))
 		return 0;

 	return spi_flash_ctrlr_protect_region(flash, r, WRITE_PROTECT);
@@ -472,7 +472,7 @@ static int protect_mrc_cache(const char *name)
 {
 	struct region region;

-	if (!IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT))
+	if (!CONFIG(MRC_SETTINGS_PROTECT))
 		return 0;

 	if (lookup_region_by_name(name, &region) < 0) {
@@ -507,7 +507,7 @@ static void protect_mrc_region(void)
 	if (protect_mrc_cache(UNIFIED_MRC_CACHE) == 0)
 		return;

-	if (IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE))
+	if (CONFIG(HAS_RECOVERY_MRC_CACHE))
 		protect_mrc_cache(RECOVERY_MRC_CACHE);

 	protect_mrc_cache(DEFAULT_MRC_CACHE);
@@ -548,10 +548,10 @@ static void update_mrc_cache(void *unused)
 {
 	update_mrc_cache_by_type(MRC_TRAINING_DATA);

-	if (IS_ENABLED(CONFIG_MRC_SETTINGS_VARIABLE_DATA))
+	if (CONFIG(MRC_SETTINGS_VARIABLE_DATA))
 		update_mrc_cache_by_type(MRC_VARIABLE_DATA);

-	if (IS_ENABLED(CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN))
+	if (CONFIG(MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN))
 		invalidate_normal_cache();

 	protect_mrc_region();
@@ -562,7 +562,7 @@ static void update_mrc_cache(void *unused)
 * Some implementations may require this to be later than others.
 */

-#if IS_ENABLED(CONFIG_MRC_WRITE_NV_LATE)
+#if CONFIG(MRC_WRITE_NV_LATE)
 BOOT_STATE_INIT_ENTRY(BS_OS_RESUME_CHECK, BS_ON_ENTRY, update_mrc_cache, NULL);
 #else
 BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_EXIT, update_mrc_cache, NULL);
--- a/src/drivers/net/r8168.c
+++ b/src/drivers/net/r8168.c
@@ -190,7 +190,7 @@ static void program_mac_address(struct device *dev, u16 io_base)
 	bool mac_found = false;

 	/* check the VPD for the mac address */
-	if (IS_ENABLED(CONFIG_RT8168_GET_MAC_FROM_VPD)) {
+	if (CONFIG(RT8168_GET_MAC_FROM_VPD)) {
 		/* Current implementation is up to 10 NIC cards */
 		if (config && config->device_index <= MAX_DEVICE_SUPPORT) {
 			/* check "ethernet_mac" first when the device index is 1 */
@@ -294,11 +294,11 @@ static void r8168_init(struct device *dev)
 	program_mac_address(dev, io_base);

 	/* Program customized LED mode */
-	if (IS_ENABLED(CONFIG_RT8168_SET_LED_MODE))
+	if (CONFIG(RT8168_SET_LED_MODE))
 		r8168_set_customized_led(dev, io_base);
 }

-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 #define R8168_ACPI_HID "R8168"
 static void r8168_net_fill_ssdt(struct device *dev)
 {
@@ -346,7 +346,7 @@ static struct device_operations r8168_ops  = {
 	.enable_resources = pci_dev_enable_resources,
 	.init             = r8168_init,
 	.scan_bus         = 0,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name                = r8168_net_acpi_name,
 	.acpi_fill_ssdt_generator = r8168_net_fill_ssdt,
 #endif
--- a/src/drivers/pc80/pc/i8254.c
+++ b/src/drivers/pc80/pc/i8254.c
@@ -31,7 +31,7 @@ void setup_i8254(void)
 	outb(0x12, TIMER1_PORT);
 }

-#if IS_ENABLED(CONFIG_UDELAY_TIMER2)
+#if CONFIG(UDELAY_TIMER2)
 static void load_timer2(unsigned int ticks)
 {
 	/* Set up the timer gate, turn off the speaker */
--- a/src/drivers/pc80/rtc/mc146818rtc.c
+++ b/src/drivers/pc80/rtc/mc146818rtc.c
@@ -30,7 +30,7 @@
 #include <security/vboot/vbnv_layout.h>

 /* There's no way around this include guard. option_table.h is autogenerated */
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
 #include "option_table.h"
 #else
 #define LB_CKS_RANGE_START	0
@@ -41,7 +41,7 @@
 #include <smp/spinlock.h>

 #if (defined(__PRE_RAM__) &&	\
-IS_ENABLED(CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK))
+CONFIG(HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK))
 	#define LOCK_NVRAM_CBFS_SPINLOCK() spin_lock(romstage_nvram_cbfs_lock())
 	#define UNLOCK_NVRAM_CBFS_SPINLOCK() spin_unlock(romstage_nvram_cbfs_lock())
 #else
@@ -70,7 +70,7 @@ static int cmos_checksum_valid(int range_start, int range_end, int cks_loc)
 	int i;
 	u16 sum, old_sum;

-	if (IS_ENABLED(CONFIG_STATIC_OPTION_TABLE))
+	if (CONFIG(STATIC_OPTION_TABLE))
 		return 1;

 	sum = 0;
@@ -122,7 +122,7 @@ static bool __cmos_init(bool invalid)
 	x = cmos_read(RTC_VALID);
 	cmos_invalid = !(x & RTC_VRT);

-	if (IS_ENABLED(CONFIG_USE_OPTION_TABLE)) {
+	if (CONFIG(USE_OPTION_TABLE)) {
 		/* See if there is a CMOS checksum error */
 		checksum_invalid = !cmos_checksum_valid(PC_CKS_RANGE_START,
 						PC_CKS_RANGE_END, PC_CKS_LOC);
@@ -162,7 +162,7 @@ static bool __cmos_init(bool invalid)
 	/* Ensure all reserved bits are 0 in register D */
 	cmos_write(RTC_VRT, RTC_VALID);

-	if (IS_ENABLED(CONFIG_USE_OPTION_TABLE)) {
+	if (CONFIG(USE_OPTION_TABLE)) {
 		/* See if there is a LB CMOS checksum error */
 		checksum_invalid = !cmos_checksum_valid(LB_CKS_RANGE_START,
 				LB_CKS_RANGE_END, LB_CKS_LOC);
@@ -196,7 +196,7 @@ static void cmos_init_vbnv(bool invalid)

 void cmos_init(bool invalid)
 {
-	if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS))
+	if (CONFIG(VBOOT_VBNV_CMOS))
 		cmos_init_vbnv(invalid);
 	else
 		__cmos_init(invalid);
@@ -272,7 +272,7 @@ enum cb_err get_option(void *dest, const char *name)
 	size_t namelen;
 	int found = 0;

-	if (!IS_ENABLED(CONFIG_USE_OPTION_TABLE))
+	if (!CONFIG(USE_OPTION_TABLE))
 		return CB_CMOS_OTABLE_DISABLED;

 	LOCK_NVRAM_CBFS_SPINLOCK();
@@ -370,7 +370,7 @@ unsigned int read_option_lowlevel(unsigned int start, unsigned int size,
 {
 	printk(BIOS_NOTICE, "NOTICE: read_option() used to access CMOS "
 		"from non-ROMCC code, please use get_option() instead.\n");
-	if (IS_ENABLED(CONFIG_USE_OPTION_TABLE)) {
+	if (CONFIG(USE_OPTION_TABLE)) {
 		const unsigned char byte = cmos_read(start / 8);
 		return (byte >> (start & 7U)) & ((1U << size) - 1U);
 	}
@@ -386,7 +386,7 @@ enum cb_err set_option(const char *name, void *value)
 	size_t namelen;
 	int found = 0;

-	if (!IS_ENABLED(CONFIG_USE_OPTION_TABLE))
+	if (!CONFIG(USE_OPTION_TABLE))
 		return CB_CMOS_OTABLE_DISABLED;

 	/* Figure out how long name is */
@@ -506,7 +506,7 @@ void set_boot_successful(void)

 	byte = inb(RTC_PORT(1));

-	if (IS_ENABLED(CONFIG_SKIP_MAX_REBOOT_CNT_CLEAR)) {
+	if (CONFIG(SKIP_MAX_REBOOT_CNT_CLEAR)) {
 		/*
 		 * Set the fallback boot bit to allow for recovery if
 		 * the payload fails to boot.
--- a/src/drivers/pc80/rtc/mc146818rtc_boot.c
+++ b/src/drivers/pc80/rtc/mc146818rtc_boot.c
@@ -18,7 +18,7 @@
 #include <cbfs.h>
 #endif
 #include <pc80/mc146818rtc.h>
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
 #include <option_table.h>
 #endif

@@ -34,7 +34,7 @@ int cmos_error(void)
 int cmos_chksum_valid(void);
 int cmos_chksum_valid(void)
 {
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
 	unsigned char addr;
 	u16 sum, old_sum;

@@ -53,11 +53,11 @@ int cmos_chksum_valid(void)
 #endif
 }

-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
 void sanitize_cmos(void)
 {
 	if (cmos_error() || !cmos_chksum_valid() ||
-	    IS_ENABLED(CONFIG_STATIC_OPTION_TABLE)) {
+	    CONFIG(STATIC_OPTION_TABLE)) {
 		size_t length = 128;
 		const unsigned char *cmos_default =
 #ifdef __ROMCC__
--- a/src/drivers/pc80/rtc/mc146818rtc_romcc.c
+++ b/src/drivers/pc80/rtc/mc146818rtc_romcc.c
@@ -63,7 +63,7 @@ static inline __attribute__((unused)) int do_normal_boot(void)

 unsigned read_option_lowlevel(unsigned start, unsigned size, unsigned def)
 {
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+#if CONFIG(USE_OPTION_TABLE)
 	unsigned byte;

 	byte = cmos_read(start/8);
--- a/src/drivers/pc80/tpm/tis.c
+++ b/src/drivers/pc80/tpm/tis.c
@@ -45,7 +45,7 @@
 #define TPM_MCI_UUID	"376054ed-cc13-4675-901c-4756d7f2d45d"
 /* coreboot wrapper for TPM driver (start) */
 #define	TPM_DEBUG(fmt, args...)		\
-	if (IS_ENABLED(CONFIG_DEBUG_TPM)) {		\
+	if (CONFIG(DEBUG_TPM)) {		\
 		printk(BIOS_DEBUG, PREFIX);		\
 		printk(BIOS_DEBUG, fmt, ##args);	\
 	}
@@ -126,7 +126,7 @@ static const struct device_name atmel_devices[] = {

 static const struct device_name infineon_devices[] = {
 	{0x000b, "SLB9635 TT 1.2"},
-#if IS_ENABLED(CONFIG_TPM2)
+#if CONFIG(TPM2)
 	{0x001a, "SLB9665 TT 2.0"},
 	{0x001b, "SLB9670 TT 2.0"},
 #else
@@ -602,7 +602,7 @@ static u32 tis_readresponse(u8 *buffer, size_t *len)
 		 * and tis_has_valid_data(), or some race-condition-related
 		 * issue will occur.
 		 */
-		if (IS_ENABLED(CONFIG_TPM_RDRESP_NEED_DELAY))
+		if (CONFIG(TPM_RDRESP_NEED_DELAY))
 			udelay(10);

 	} while (tis_has_valid_data(locality));
@@ -783,7 +783,7 @@ static void lpc_tpm_set_resources(struct device *dev)
 	}
 }

-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)

 static void tpm_ppi_func0_cb(void *arg)
 {
@@ -794,7 +794,7 @@ static void tpm_ppi_func0_cb(void *arg)

 static void tpm_ppi_func1_cb(void *arg)
 {
-	if (IS_ENABLED(CONFIG_TPM2))
+	if (CONFIG(TPM2))
 		/* Interface version: 2.0 */
 		acpigen_write_return_string("2.0");
 	else
@@ -942,7 +942,7 @@ static void lpc_tpm_fill_ssdt(struct device *dev)

 	acpigen_write_resourcetemplate_footer();

-	if (!IS_ENABLED(CONFIG_CHROMEOS)) {
+	if (!CONFIG(CHROMEOS)) {
 		/*
 		 * _DSM method
 		 */
@@ -981,7 +981,7 @@ static const char *lpc_tpm_acpi_name(const struct device *dev)
 static struct device_operations lpc_tpm_ops = {
 	.read_resources   = lpc_tpm_read_resources,
 	.set_resources    = lpc_tpm_set_resources,
-#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
+#if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name		= lpc_tpm_acpi_name,
 	.acpi_fill_ssdt_generator = lpc_tpm_fill_ssdt,
 #endif
--- a/src/drivers/siemens/nc_fpga/nc_fpga.c
+++ b/src/drivers/siemens/nc_fpga/nc_fpga.c
@@ -140,7 +140,7 @@ static void nc_fpga_init(struct device *dev)
 	}
 }

-#if IS_ENABLED(CONFIG_NC_FPGA_NOTIFY_CB_READY)
+#if CONFIG(NC_FPGA_NOTIFY_CB_READY)
 /* Set FW_DONE bit in FPGA before jumping to payload. */
 static void set_fw_done(void *unused)
 {
--- a/src/drivers/smmstore/store.c
+++ b/src/drivers/smmstore/store.c
@@ -58,7 +58,7 @@
 static int lookup_store(struct region_device *rstore)
 {
 	struct cbfsf file;
-	if (IS_ENABLED(CONFIG_SMMSTORE_IN_CBFS)) {
+	if (CONFIG(SMMSTORE_IN_CBFS)) {
 		if (cbfs_locate_file_in_region(&file,
 			       CONFIG_SMMSTORE_REGION,
 			       CONFIG_SMMSTORE_FILENAME, NULL) < 0) {
--- a/src/drivers/spi/adesto.c
+++ b/src/drivers/spi/adesto.c
@@ -162,7 +162,7 @@ static int adesto_write(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[1] = (offset >> 16) & 0xff;
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		        " chunk_len = %zu\n", buf + actual,
 			cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
@@ -188,7 +188,7 @@ static int adesto_write(const struct spi_flash *flash, u32 offset, size_t len,
 		offset += chunk_len;
 	}

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 	printk(BIOS_SPEW, "SF: adesto: Successfully programmed %zu bytes @"
 			" 0x%lx\n", len, (unsigned long)(offset - len));
 #endif
@@ -201,7 +201,7 @@ out:
 static const struct spi_flash_ops spi_flash_ops = {
 	.write = adesto_write,
 	.erase = spi_flash_cmd_erase,
-#if IS_ENABLED(CONFIG_SPI_FLASH_NO_FAST_READ)
+#if CONFIG(SPI_FLASH_NO_FAST_READ)
 	.read = spi_flash_cmd_read_slow,
 #else
 	.read = spi_flash_cmd_read_fast,
--- a/src/drivers/spi/amic.c
+++ b/src/drivers/spi/amic.c
@@ -136,7 +136,7 @@ static int amic_write(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[1] = (offset >> 16) & 0xff;
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		        " chunk_len = %zu\n", buf + actual,
 			cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
@@ -163,7 +163,7 @@ static int amic_write(const struct spi_flash *flash, u32 offset, size_t len,
 		byte_addr = 0;
 	}

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 	printk(BIOS_SPEW, "SF: AMIC: Successfully programmed %zu bytes @"
 			" 0x%lx\n", len, (unsigned long)(offset - len));
 #endif
@@ -176,7 +176,7 @@ out:
 static const struct spi_flash_ops spi_flash_ops = {
 	.write = amic_write,
 	.erase = spi_flash_cmd_erase,
-#if IS_ENABLED(CONFIG_SPI_FLASH_NO_FAST_READ)
+#if CONFIG(SPI_FLASH_NO_FAST_READ)
 	.read = spi_flash_cmd_read_slow,
 #else
 	.read = spi_flash_cmd_read_fast,
--- a/src/drivers/spi/atmel.c
+++ b/src/drivers/spi/atmel.c
@@ -118,7 +118,7 @@ static int atmel_write(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[1] = (offset >> 16) & 0xff;
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		        " chunk_len = %zu\n", buf + actual,
 			cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
@@ -144,7 +144,7 @@ static int atmel_write(const struct spi_flash *flash, u32 offset, size_t len,
 		offset += chunk_len;
 	}

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 	printk(BIOS_SPEW, "SF: Atmel: Successfully programmed %zu bytes @"
 			" 0x%lx\n", len, (unsigned long)(offset - len));
 #endif
@@ -157,7 +157,7 @@ out:
 static const struct spi_flash_ops spi_flash_ops = {
 	.write = atmel_write,
 	.erase = spi_flash_cmd_erase,
-#if IS_ENABLED(CONFIG_SPI_FLASH_NO_FAST_READ)
+#if CONFIG(SPI_FLASH_NO_FAST_READ)
 	.read = spi_flash_cmd_read_slow,
 #else
 	.read = spi_flash_cmd_read_fast,
--- a/src/drivers/spi/eon.c
+++ b/src/drivers/spi/eon.c
@@ -257,7 +257,7 @@ static int eon_write(const struct spi_flash *flash,
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW,
 		    "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
 		     buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
@@ -279,7 +279,7 @@ static int eon_write(const struct spi_flash *flash,
 		offset += chunk_len;
 	}

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 	printk(BIOS_SPEW, "SF: EON: Successfully programmed %zu bytes @ %#x\n",
 	       len, (unsigned int)(offset - len));
 #endif
--- a/src/drivers/spi/gigadevice.c
+++ b/src/drivers/spi/gigadevice.c
@@ -184,7 +184,7 @@ static int gigadevice_write(const struct spi_flash *flash, u32 offset,
 		cmd[1] = (offset >> 16) & 0xff;
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW,
 		       "PP gigadevice.c: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		       " chunk_len = %zu\n", buf + actual,
@@ -206,7 +206,7 @@ static int gigadevice_write(const struct spi_flash *flash, u32 offset,
 		offset += chunk_len;
 	}

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 	printk(BIOS_SPEW,
 	       "SF gigadevice.c: Successfully programmed %zu bytes @ %#x\n",
 	       len, (unsigned int)(offset - len));
@@ -222,7 +222,7 @@ static const struct spi_flash_ops spi_flash_ops = {
 	.write = gigadevice_write,
 	.erase = spi_flash_cmd_erase,
 	.status = spi_flash_cmd_status,
-#if IS_ENABLED(CONFIG_SPI_FLASH_NO_FAST_READ)
+#if CONFIG(SPI_FLASH_NO_FAST_READ)
 	.read = spi_flash_cmd_read_slow,
 #else
 	.read = spi_flash_cmd_read_fast,
--- a/src/drivers/spi/macronix.c
+++ b/src/drivers/spi/macronix.c
@@ -230,7 +230,7 @@ static int macronix_write(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[1] = (offset >> 16) & 0xff;
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		     " chunk_len = %zu\n",
 		     buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
@@ -256,7 +256,7 @@ static int macronix_write(const struct spi_flash *flash, u32 offset, size_t len,
 		offset += chunk_len;
 	}

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 	printk(BIOS_SPEW, "SF: Macronix: Successfully programmed %zu bytes @"
 	      " 0x%lx\n", len, (unsigned long)(offset - len));
 #endif
@@ -268,7 +268,7 @@ static const struct spi_flash_ops spi_flash_ops = {
 	.write = macronix_write,
 	.erase = spi_flash_cmd_erase,
 	.status = spi_flash_cmd_status,
-#if IS_ENABLED(CONFIG_SPI_FLASH_NO_FAST_READ)
+#if CONFIG(SPI_FLASH_NO_FAST_READ)
 	.read = spi_flash_cmd_read_slow,
 #else
 	.read = spi_flash_cmd_read_fast,
--- a/src/drivers/spi/spansion.c
+++ b/src/drivers/spi/spansion.c
@@ -245,7 +245,7 @@ static int spansion_write(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		     " chunk_len = %zu\n",
 		     buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
@@ -271,7 +271,7 @@ static int spansion_write(const struct spi_flash *flash, u32 offset, size_t len,
 		offset += chunk_len;
 	}

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 	printk(BIOS_SPEW, "SF: SPANSION: Successfully programmed %zu bytes @ 0x%x\n",
 	      len, offset);
 #endif
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -217,7 +217,7 @@ int spi_flash_cmd_erase(const struct spi_flash *flash, u32 offset, size_t len)
 		spi_flash_addr(offset, cmd);
 		offset += erase_size;

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW, "SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
 		      cmd[2], cmd[3], offset);
 #endif
@@ -276,38 +276,38 @@ static struct {
 		      struct spi_flash *flash);
 } flashes[] = {
 	/* Keep it sorted by define name */
-#if IS_ENABLED(CONFIG_SPI_FLASH_AMIC)
+#if CONFIG(SPI_FLASH_AMIC)
 	{ 0, 0x37, spi_flash_probe_amic, },
 #endif
-#if IS_ENABLED(CONFIG_SPI_FLASH_ATMEL)
+#if CONFIG(SPI_FLASH_ATMEL)
 	{ 0, 0x1f, spi_flash_probe_atmel, },
 #endif
-#if IS_ENABLED(CONFIG_SPI_FLASH_EON)
+#if CONFIG(SPI_FLASH_EON)
 	{ 0, 0x1c, spi_flash_probe_eon, },
 #endif
-#if IS_ENABLED(CONFIG_SPI_FLASH_GIGADEVICE)
+#if CONFIG(SPI_FLASH_GIGADEVICE)
 	{ 0, 0xc8, spi_flash_probe_gigadevice, },
 #endif
-#if IS_ENABLED(CONFIG_SPI_FLASH_MACRONIX)
+#if CONFIG(SPI_FLASH_MACRONIX)
 	{ 0, 0xc2, spi_flash_probe_macronix, },
 #endif
-#if IS_ENABLED(CONFIG_SPI_FLASH_SPANSION)
+#if CONFIG(SPI_FLASH_SPANSION)
 	{ 0, 0x01, spi_flash_probe_spansion, },
 #endif
-#if IS_ENABLED(CONFIG_SPI_FLASH_SST)
+#if CONFIG(SPI_FLASH_SST)
 	{ 0, 0xbf, spi_flash_probe_sst, },
 #endif
-#if IS_ENABLED(CONFIG_SPI_FLASH_STMICRO)
+#if CONFIG(SPI_FLASH_STMICRO)
 	{ 0, 0x20, spi_flash_probe_stmicro, },
 #endif
-#if IS_ENABLED(CONFIG_SPI_FLASH_WINBOND)
+#if CONFIG(SPI_FLASH_WINBOND)
 	{ 0, 0xef, spi_flash_probe_winbond, },
 #endif
 	/* Keep it sorted by best detection */
-#if IS_ENABLED(CONFIG_SPI_FLASH_STMICRO)
+#if CONFIG(SPI_FLASH_STMICRO)
 	{ 0, 0xff, spi_flash_probe_stmicro, },
 #endif
-#if IS_ENABLED(CONFIG_SPI_FLASH_ADESTO)
+#if CONFIG(SPI_FLASH_ADESTO)
 	{ 0, 0x1f, spi_flash_probe_adesto, },
 #endif
 };
@@ -324,7 +324,7 @@ int spi_flash_generic_probe(const struct spi_slave *spi,
 	if (ret)
 		return -1;

-	if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) {
+	if (CONFIG(DEBUG_SPI_FLASH)) {
 		printk(BIOS_SPEW, "SF: Got idcode: ");
 		for (i = 0; i < sizeof(idcode); i++)
 			printk(BIOS_SPEW, "%02x ", idcode[i]);
@@ -511,7 +511,7 @@ int spi_flash_volatile_group_begin(const struct spi_flash *flash)
 	uint32_t count;
 	int ret = 0;

-	if (!IS_ENABLED(CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP))
+	if (!CONFIG(SPI_FLASH_HAS_VOLATILE_GROUP))
 		return ret;

 	count = car_get_var(volatile_group_count);
@@ -528,7 +528,7 @@ int spi_flash_volatile_group_end(const struct spi_flash *flash)
 	uint32_t count;
 	int ret = 0;

-	if (!IS_ENABLED(CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP))
+	if (!CONFIG(SPI_FLASH_HAS_VOLATILE_GROUP))
 		return ret;

 	count = car_get_var(volatile_group_count);
@@ -547,7 +547,7 @@ void lb_spi_flash(struct lb_header *header)
 	struct lb_spi_flash *flash;
 	const struct spi_flash *spi_flash_dev;

-	if (!IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH))
+	if (!CONFIG(BOOT_DEVICE_SPI_FLASH))
 		return;

 	flash = (struct lb_spi_flash *)lb_new_record(header);
--- a/src/drivers/spi/sst.c
+++ b/src/drivers/spi/sst.c
@@ -168,7 +168,7 @@ sst_byte_write(const struct spi_flash *flash, u32 offset, const void *buf)
 		offset,
 	};

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 	printk(BIOS_SPEW, "BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 		spi_w8r8(&flash->spi, CMD_SST_RDSR), buf, cmd[0], offset);
 #endif
@@ -223,7 +223,7 @@ static int sst_write_256(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[1] = (offset >> 16) & 0xff;
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		     " chunk_len = %zu\n",
 		     buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
@@ -250,7 +250,7 @@ static int sst_write_256(const struct spi_flash *flash, u32 offset, size_t len,
 	}

 done:
-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 	printk(BIOS_SPEW, "SF: SST: program %s %zu bytes @ 0x%lx\n",
 	      ret ? "failure" : "success", len, (unsigned long)offset - actual);
 #endif
@@ -284,7 +284,7 @@ static int sst_write_ai(const struct spi_flash *flash, u32 offset, size_t len,
 	cmd[3] = offset;

 	for (; actual < len - 1; actual += 2) {
-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW, "WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 		     spi_w8r8(&flash->spi, CMD_SST_RDSR), buf + actual, cmd[0],
 		     offset);
@@ -313,7 +313,7 @@ static int sst_write_ai(const struct spi_flash *flash, u32 offset, size_t len,
 		ret = sst_byte_write(flash, offset, buf + actual);

 done:
-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 	printk(BIOS_SPEW, "SF: SST: program %s %zu bytes @ 0x%lx\n",
 	      ret ? "failure" : "success", len, (unsigned long)offset - actual);
 #endif
--- a/src/drivers/spi/stmicro.c
+++ b/src/drivers/spi/stmicro.c
@@ -312,7 +312,7 @@ static int stmicro_write(const struct spi_flash *flash,
 		cmd[1] = (offset >> 16) & 0xff;
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		     " chunk_len = %zu\n",
 		     buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
@@ -338,7 +338,7 @@ static int stmicro_write(const struct spi_flash *flash,
 		offset += chunk_len;
 	}

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 	printk(BIOS_SPEW, "SF: STMicro: Successfully programmed %zu bytes @"
 			" 0x%lx\n", len, (unsigned long)(offset - len));
 #endif
--- a/src/drivers/spi/winbond.c
+++ b/src/drivers/spi/winbond.c
@@ -300,7 +300,7 @@ static int winbond_write(const struct spi_flash *flash, u32 offset, size_t len,
 		cmd[1] = (offset >> 16) & 0xff;
 		cmd[2] = (offset >> 8) & 0xff;
 		cmd[3] = offset & 0xff;
-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 		printk(BIOS_SPEW, "PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }"
 		        " chunk_len = %zu\n", buf + actual,
 			cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
@@ -326,7 +326,7 @@ static int winbond_write(const struct spi_flash *flash, u32 offset, size_t len,
 		offset += chunk_len;
 	}

-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
+#if CONFIG(DEBUG_SPI_FLASH)
 	printk(BIOS_SPEW, "SF: Winbond: Successfully programmed %zu bytes @"
 			" 0x%lx\n", len, (unsigned long)(offset - len));
 #endif
@@ -657,7 +657,7 @@ static const struct spi_flash_ops spi_flash_ops = {
 	.write = winbond_write,
 	.erase = spi_flash_cmd_erase,
 	.status = spi_flash_cmd_status,
-#if IS_ENABLED(CONFIG_SPI_FLASH_NO_FAST_READ)
+#if CONFIG(SPI_FLASH_NO_FAST_READ)
 	.read = spi_flash_cmd_read_slow,
 #else
 	.read = spi_flash_cmd_read_fast,
--- a/src/drivers/tpm/tpm.c
+++ b/src/drivers/tpm/tpm.c
@@ -18,13 +18,13 @@
 #include <bootstate.h>
 #include <security/tpm/tspi.h>

-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#if CONFIG(HAVE_ACPI_RESUME)
 #include <arch/acpi.h>
 #endif

 static void init_tpm_dev(void *unused)
 {
-#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+#if CONFIG(HAVE_ACPI_RESUME)
 	int s3resume = acpi_is_wakeup_s3();
 	tpm_setup(s3resume);
 #else
--- a/src/drivers/uart/uart8250io.c
+++ b/src/drivers/uart/uart8250io.c
@@ -101,7 +101,7 @@ uintptr_t uart_platform_base(int idx)

 void uart_init(int idx)
 {
-	if (!IS_ENABLED(CONFIG_DRIVERS_UART_8250IO_SKIP_INIT)) {
+	if (!CONFIG(DRIVERS_UART_8250IO_SKIP_INIT)) {
 		unsigned int div;
 		div = uart_baudrate_divisor(get_uart_baudrate(),
 			uart_platform_refclk(), uart_input_clock_divider());
--- a/src/drivers/uart/uart8250mem.c
+++ b/src/drivers/uart/uart8250mem.c
@@ -31,7 +31,7 @@
 #define SINGLE_CHAR_TIMEOUT	(50 * 1000)
 #define FIFO_TIMEOUT		(16 * SINGLE_CHAR_TIMEOUT)

-#if IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM_32)
+#if CONFIG(DRIVERS_UART_8250MEM_32)
 static uint8_t uart8250_read(void *base, uint8_t reg)
 {
 	return read32(base + 4 * reg) & 0xff;
@@ -156,7 +156,7 @@ void uart_fill_lb(void *data)
 	if (!serial.baseaddr)
 		return;
 	serial.baud = get_uart_baudrate();
-	if (IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM_32))
+	if (CONFIG(DRIVERS_UART_8250MEM_32))
 		serial.regwidth = sizeof(uint32_t);
 	else
 		serial.regwidth = sizeof(uint8_t);
--- a/src/drivers/uart/util.c
+++ b/src/drivers/uart/util.c
@@ -22,7 +22,7 @@ unsigned int uart_baudrate_divisor(unsigned int baudrate,
 	return (1 + (2 * refclk) / (baudrate * oversample)) / 2;
 }

-#if !IS_ENABLED(CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER)
+#if !CONFIG(UART_OVERRIDE_INPUT_CLOCK_DIVIDER)
 unsigned int uart_input_clock_divider(void)
 {
 	/* Specify the default oversample rate for the UART.
@@ -39,7 +39,7 @@ unsigned int uart_input_clock_divider(void)
 }
 #endif

-#if !IS_ENABLED(CONFIG_UART_OVERRIDE_REFCLK)
+#if !CONFIG(UART_OVERRIDE_REFCLK)
 unsigned int uart_platform_refclk(void)
 {
 	/* Specify the default input clock frequency for the UART.
--- a/src/drivers/usb/ehci_debug.c
+++ b/src/drivers/usb/ehci_debug.c
@@ -35,7 +35,7 @@ struct ehci_debug_info {
 	struct dbgp_pipe ep_pipe[DBGP_MAX_ENDPOINTS];
 } __packed;

-#if IS_ENABLED(CONFIG_DEBUG_CONSOLE_INIT)
+#if CONFIG(DEBUG_CONSOLE_INIT)
 /* When selected, you can debug the connection of usbdebug dongle.
 * EHCI port register bits and USB packets are dumped on console,
 * assuming some other console already works.
@@ -217,7 +217,7 @@ static void dbgp_print_data(struct ehci_dbg_port *ehci_debug)
 	int len;
 	u32 ctrl, lo, hi;

-	if (!IS_ENABLED(CONFIG_DEBUG_CONSOLE_INIT) || dbgp_enabled())
+	if (!CONFIG(DEBUG_CONSOLE_INIT) || dbgp_enabled())
 		return;

 	ctrl = read32(&ehci_debug->control);
@@ -720,7 +720,7 @@ static void migrate_ehci_debug(int is_recovery)
 		return;
 	}

-	if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)) {
+	if (CONFIG(USBDEBUG_IN_PRE_RAM)) {
 		/* Use state in CBMEM. */
 		dbg_info_cbmem = cbmem_find(CBMEM_ID_EHCI_DEBUG);
 		if (dbg_info_cbmem)
@@ -759,13 +759,13 @@ void usbdebug_init(void)
 	 * CBMEM_INIT_HOOKs for postcar and ramstage as we recover state
 	 * from CBMEM.
 	 */
-	if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)
+	if (CONFIG(USBDEBUG_IN_PRE_RAM)
 	    && (ENV_ROMSTAGE || ENV_BOOTBLOCK))
 		usbdebug_hw_init(false);

 	/* USB console init is done early in ramstage if it was
 	 * not done in romstage, this does not require CBMEM.
 	 */
-	if (!IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM) && ENV_RAMSTAGE)
+	if (!CONFIG(USBDEBUG_IN_PRE_RAM) && ENV_RAMSTAGE)
 		usbdebug_hw_init(false);
 }
--- a/src/drivers/usb/gadget.c
+++ b/src/drivers/usb/gadget.c
@@ -342,7 +342,7 @@ int dbgp_probe_gadget(struct ehci_dbg_port *ehci_debug, struct dbgp_pipe *pipe)
 		}
 	}

-	if (IS_ENABLED(CONFIG_USBDEBUG_DONGLE_FTDI_FT232H)) {
+	if (CONFIG(USBDEBUG_DONGLE_FTDI_FT232H)) {
 		ret = probe_for_ftdi(ehci_debug, pipe);
 	} else {
 		ret = probe_for_debug_descriptor(ehci_debug, pipe);
--- a/src/drivers/xgi/common/vb_init.c
+++ b/src/drivers/xgi/common/vb_init.c
@@ -853,7 +853,7 @@ static void XGINew_SetDRAMSize_340(struct xgifb_video_info *xgifb_info,

 	pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress;

-	if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER))
+	if (CONFIG(LINEAR_FRAMEBUFFER))
 		XGISetModeNew(xgifb_info, HwDeviceExtension, 0x2e);

 	data = xgifb_reg_get(pVBInfo->P3c4, 0x21);
--- a/src/drivers/xgi/common/xgi_coreboot.c
+++ b/src/drivers/xgi/common/xgi_coreboot.c
@@ -118,7 +118,7 @@ int xgifb_probe(struct pci_dev *pdev, struct xgifb_video_info *xgifb_info)
 		xgifb_info->video_size = video_size_max;
 	}

-	if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) {
+	if (CONFIG(LINEAR_FRAMEBUFFER)) {
 		/* Enable PCI_LINEAR_ADDRESSING and MMIO_ENABLE  */
 		xgifb_reg_or(XGISR,
 			     IND_SIS_PCI_ADDRESS_SET,
@@ -263,7 +263,7 @@ int xgifb_probe(struct pci_dev *pdev, struct xgifb_video_info *xgifb_info)
 			xgifb_info->mode_idx =
 				XGIfb_GetXG21DefaultLVDSModeIdx(xgifb_info);
 		else
-			if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER))
+			if (CONFIG(LINEAR_FRAMEBUFFER))
 				xgifb_info->mode_idx = DEFAULT_MODE;
 			else
 				xgifb_info->mode_idx = DEFAULT_TEXT_MODE;
@@ -338,7 +338,7 @@ int xgifb_modeset(struct pci_dev *pdev, struct xgifb_video_info *xgifb_info)

 	hw_info = &xgifb_info->hw_info;

-	if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) {
+	if (CONFIG(LINEAR_FRAMEBUFFER)) {
 		/* Set mode */
 		XGIfb_pre_setmode(xgifb_info);
 		if (XGISetModeNew(xgifb_info, hw_info,
--- a/src/drivers/xgi/z9s/z9s.c
+++ b/src/drivers/xgi/z9s/z9s.c
@@ -39,7 +39,7 @@ static void xgi_z9s_init(struct device *dev)
 	u8 ret;
 	struct xgifb_video_info *xgifb_info;

-	if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {
+	if (CONFIG(MAINBOARD_DO_NATIVE_VGA_INIT)) {
 		printk(BIOS_INFO, "XGI Z9s: initializing video device\n");
 		xgifb_info = malloc(sizeof(*xgifb_info));
 		ret = xgifb_probe(dev, xgifb_info);