sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)

Browse Source 
This patch is a raw application of

 find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'

Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Julius Werner
2019-03-05 16:53:33 -08:00
committed by Patrick Georgi
parent b3a8cc54db
commit cd49cce7b7
920 changed files with 2285 additions and 2285 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/include/cpu/x86/lapic.h
View File

@@ -45,7 +45,7 @@ static __always_inline unsigned long lapicid(void)
return lapic_read(LAPIC_ID) >> 24;
}
#if !IS_ENABLED(CONFIG_AP_IN_SIPI_WAIT)
#if !CONFIG(AP_IN_SIPI_WAIT)
/* If we need to go back to sipi wait, we use the long non-inlined version of
* this function in lapic_cpu_init.c
*/
@@ -142,7 +142,7 @@ void do_lapic_init(void);
/* See if I need to initialize the local APIC */
static inline int need_lapic_init(void)
{
return IS_ENABLED(CONFIG_SMP) || IS_ENABLED(CONFIG_IOAPIC);
return CONFIG(SMP) || CONFIG(IOAPIC);
}
static inline void setup_lapic(void)

2
src/include/cpu/x86/msr.h
View File

@@ -105,7 +105,7 @@ typedef struct msrinit_struct {
msr_t msr;
} msrinit_t;
#if IS_ENABLED(CONFIG_SOC_SETS_MSRS)
#if CONFIG(SOC_SETS_MSRS)
msr_t soc_msr_read(unsigned int index);
void soc_msr_write(unsigned int index, msr_t msr);

2
src/include/cpu/x86/post_code.h
View File

@@ -4,7 +4,7 @@
#include <console/post_codes.h>
#if IS_ENABLED(CONFIG_POST_IO)
#if CONFIG(POST_IO)
#define post_code(value) \
movb $value, %al; \
outb %al, $CONFIG_POST_IO_PORT

4
src/include/cpu/x86/smm.h
View File

@@ -486,7 +486,7 @@ int mainboard_io_trap_handler(int smif);
void southbridge_smi_set_eos(void);
#if IS_ENABLED(CONFIG_SMM_TSEG)
#if CONFIG(SMM_TSEG)
void cpu_smi_handler(void);
void northbridge_smi_handler(void);
void southbridge_smi_handler(void);
@@ -501,7 +501,7 @@ void mainboard_smi_gpi(u32 gpi_sts);
int mainboard_smi_apmc(u8 data);
void mainboard_smi_sleep(u8 slp_typ);
#if !IS_ENABLED(CONFIG_SMM_TSEG)
#if !CONFIG(SMM_TSEG)
void smi_release_lock(void);
#endif

4
src/include/cpu/x86/tsc.h
View File

@@ -3,9 +3,9 @@
#include <stdint.h>
#if IS_ENABLED(CONFIG_TSC_SYNC_MFENCE)
#if CONFIG(TSC_SYNC_MFENCE)
#define TSC_SYNC "mfence\n"
#elif IS_ENABLED(CONFIG_TSC_SYNC_LFENCE)
#elif CONFIG(TSC_SYNC_LFENCE)
#define TSC_SYNC "lfence\n"
#else
#define TSC_SYNC