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cpu/intel/model_206ax: Remove fake lapic device

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Instead of using a fake lapic device hook up the cpu cluster to chip
cpu/intel/model_206ax.

The lapic device is also not needed as the mp init will allocate it for
the BSP at runtime.

Change-Id: Id3b1c4ca027e2905535e137691c3e3e60417dbf3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59316
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Arthur Heymans
2021-11-15 20:12:02 +01:00
parent d52bfbb6aa
commit cdb26fd011
12 changed files with 40 additions and 90 deletions
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16
src/northbridge/intel/sandybridge/chipset.cb
View File

@@ -1,19 +1,13 @@
# SPDX-License-Identifier: GPL-2.0-only
chip northbridge/intel/sandybridge
device cpu_cluster 0 on
ops sandybridge_cpu_bus_ops
chip cpu/intel/model_206ax
# Magic APIC ID to locate this chip
device lapic 0 on end
device lapic 0xacac off end
chip cpu/intel/model_206ax
device cpu_cluster 0 on ops sandybridge_cpu_bus_ops end
register "acpi_c1" = "CPU_ACPI_C1"
register "acpi_c2" = "CPU_ACPI_C3"
register "acpi_c3" = "CPU_ACPI_C7"
end
register "acpi_c1" = "CPU_ACPI_C1"
register "acpi_c2" = "CPU_ACPI_C3"
register "acpi_c3" = "CPU_ACPI_C7"
end
device domain 0 on
ops sandybridge_pci_domain_ops
end

2
src/northbridge/intel/sandybridge/northbridge.c
View File

@@ -387,7 +387,6 @@ static void set_above_4g_pci(const struct device *dev)
static void mc_gen_ssdt(const struct device *dev)
{
generate_cpu_entries(dev);
set_above_4g_pci(dev);
}
@@ -416,6 +415,7 @@ struct device_operations sandybridge_cpu_bus_ops = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
.acpi_fill_ssdt = generate_cpu_entries,
};
struct chip_operations northbridge_intel_sandybridge_ops = {