flashrom: Support Pm49FL004/2 Block Locking Registers
The PMC chips understand both LPC and FWH flash commands. When in FWH mode (MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block Locking Registers by default lock the flash chip for write and erase - in addition to any chipset write protection. This patch adds unlock operations before Pm49FL004/2 write and erase, and it includes an svn mv pm49fl004.c pm49fl00x.c Thanks go to Nikolay for this patch. Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Bari Ari <bari@onelabs.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3332 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Peter Stuge
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fb047a6a54
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ce1fb9d4e9
@ -453,10 +453,10 @@ int probe_29f002(struct flashchip *flash);
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int erase_29f002(struct flashchip *flash);
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int write_29f002(struct flashchip *flash, uint8_t *buf);
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/* pm49fl004.c */
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int probe_49fl004(struct flashchip *flash);
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int erase_49fl004(struct flashchip *flash);
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int write_49fl004(struct flashchip *flash, uint8_t *buf);
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/* pm49fl00x.c */
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int probe_49fl00x(struct flashchip *flash);
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int erase_49fl00x(struct flashchip *flash);
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int write_49fl00x(struct flashchip *flash, uint8_t *buf);
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/* sharplhf00l04.c */
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int probe_lhf00l04(struct flashchip *flash);
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