soc/intel/quark: Add C bootblock

Add a bootblock which builds with C_ENVIRONMENT_BOOTBLOCK selected.
This is the first piece in supporting FSP 2.0.  Move esraminit from
romstage into the bootblock.  Replace cache_as_ram with
car_stage_entry.S and code in romstage.c

TEST=Build and run on Galileo Gen2

Change-Id: I14d2af2adb6e75d4bff1ebfb863196df04d07daf
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15132
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Lee Leahy
2016-06-05 18:48:31 -07:00
committed by Leroy P Leahy
parent 6c3c31e49d
commit ce9e21a0ea
10 changed files with 283 additions and 284 deletions

View File

@@ -18,6 +18,13 @@ ifeq ($(CONFIG_SOC_INTEL_QUARK),y)
subdirs-y += romstage
subdirs-y += ../../../cpu/x86/tsc
bootblock-y += bootblock/esram_init.S
bootblock-y += bootblock/bootblock.c
bootblock-y += i2c.c
bootblock-y += reg_access.c
bootblock-y += tsc_freq.c
bootblock-y += uart_common.c
romstage-y += i2c.c
romstage-y += memmap.c
romstage-y += reg_access.c