soc/intel/tigerlake: add ddr4-spd-empty.hex

In generating the potential spds the ddr4-spd-empty.hex was
accidentally omitted.

Generated from:
go run util/spd_tools/ddr4/gen_spd.go src/soc/intel/tigerlake/spd/ \
	util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt TGL

Change-Id: Ic8b9449830fb5405ebf138ebd54f41b0f76ba584
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44908
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Aaron Durbin
2020-08-28 09:27:57 -06:00
parent 55ccd5b873
commit ceb87150d4

View File

@ -0,0 +1,32 @@
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