include/cpu/x86/msr: fix MCG_CTL_P definition
MCG_CTL_P is bit 8 of the IA32_MCG_CAP MSR and not bit 3. Bits 0-7 of that MSR contain the number of MCA banks being present on the CPU. At the moment this definition of MCG_CTL_P is unused. Change-Id: I39a59083daa5c2db11a8074d5c4881bf55688f43 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56179 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
		| @@ -36,7 +36,7 @@ | ||||
| #define SMBASE_RO_MSR			0x98 | ||||
| #define  IA32_SMM_MONITOR_VALID		(1 << 0) | ||||
| #define IA32_MCG_CAP			0x179 | ||||
| #define  MCG_CTL_P			(1 << 3) | ||||
| #define  MCG_CTL_P			(1 << 8) | ||||
| #define  MCA_BANKS_MASK			0xff | ||||
| #define IA32_PERF_STATUS		0x198 | ||||
| #define IA32_PERF_CTL			0x199 | ||||
|   | ||||
		Reference in New Issue
	
	Block a user