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soc/intel/cannonlake: Enable S4 sleep state support

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Add ACPI entry in sleepstates.asl to support S4 (hibernate).

TEST: boot to Windows on CFL RVP11 & RVP8, verified hibernate functionality.

Change-Id: I751c774e6ec7fd89ac3af5a619033bd38a759281
Signed-off-by: praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com>
Reviewed-on: https://review.coreboot.org/28846
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
praveen hodagatta pranesh
2018-10-01 21:49:38 +08:00
committed by Patrick Georgi
parent 74258d789c
commit cf04c61170
1 changed files with 2 additions and 1 deletions
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3
src/soc/intel/cannonlake/acpi/sleepstates.asl
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@@ -1,7 +1,7 @@
/* /*
* This file is part of the coreboot project. * This file is part of the coreboot project.
* *
* Copyright (C) 2017 Intel Corp. * Copyright (C) 2017-2018 Intel Corp.
* *
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
@@ -17,4 +17,5 @@
Name (\_S0, Package () { 0x0, 0x0, 0x0, 0x0 }) Name (\_S0, Package () { 0x0, 0x0, 0x0, 0x0 })
Name (\_S3, Package () { 0x5, 0x5, 0x0, 0x0 }) Name (\_S3, Package () { 0x5, 0x5, 0x0, 0x0 })
Name (\_S4, Package () { 0x6, 0x6, 0x0, 0x0 })
Name (\_S5, Package () { 0x7, 0x7, 0x0, 0x0 }) Name (\_S5, Package () { 0x7, 0x7, 0x0, 0x0 })