mb/kontron/986lcd-m: Implement disabling ethernet NIC in ramstage
With the i82801gx code automatically disabling devices ethernet NICs attached to the southbridge PCIe ports can now be disabled during the ramstage. Change-Id: If4163f8101d37cc09c0b51b1be20bf8388ed2b89 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30245 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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committed by
Patrick Georgi
parent
e6e5ecb7e8
commit
cf2783882f
@@ -13,8 +13,10 @@
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* GNU General Public License for more details.
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*/
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#include <string.h>
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#include <types.h>
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#include <device/device.h>
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#include <device/pci_def.h>
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#include <console/console.h>
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#include <drivers/intel/gma/int15.h>
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#include <pc80/mc146818rtc.h>
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@@ -157,6 +159,32 @@ static void mainboard_enable(struct device *dev)
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hwm_setup();
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}
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static void mainboard_init(void *chip_info)
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{
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int i;
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struct device *dev;
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for (i = 1; i <= 3; i++) {
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int ethernet_disable = 0;
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char cmos_option_name[] = "ethernetx";
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snprintf(cmos_option_name, sizeof(cmos_option_name),
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"ethernet%01d", i);
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get_option(ðernet_disable, cmos_option_name);
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if (!ethernet_disable)
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continue;
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printk(BIOS_DEBUG, "Disabling Ethernet NIC #%d\n", i);
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dev = dev_find_slot(0, PCI_DEVFN(28, i - 1));
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if (dev == NULL) {
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printk(BIOS_ERR,
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"Disabling Ethernet NIC: Cannot find 00:1c.%d!\n",
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i - 1);
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continue;
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}
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dev->enabled = 0;
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}
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}
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struct chip_operations mainboard_ops = {
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.init = mainboard_init,
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.enable_dev = mainboard_enable,
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};
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