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superio/fintek/*: Factor out generic romstage component

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The romstage of Fintek Super I/O's is identical, leading to replication
of essentially the same code prone to bitrot. Herein we consolidate the
early pre-ram UART initialisation code into fintek/common, rather we
leave the exceptions to be implemented under model/.

More precisely we provide a well documented version of early_serial.c
under fintek/common and select by way of Kconfig as a generic romstage
component to Super I/O support. We leave future Super I/O's the option
to implement `non-standard` initialisation code should such a (unlikely)
need araise. A primary advantage is that new support for romstage serial
is now trival to add. We also provide some Kconfig documentation while
here.

Change-Id: I3c62561558a62ece944a167ba302fb7076bba001
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5575
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Edward O'Callaghan
2014-04-23 21:52:25 +10:00
committed by Patrick Georgi
parent 4566d2e7cd
commit cf7b498908
30 changed files with 69 additions and 314 deletions
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3
src/mainboard/iei/kino-780am2-fam10/romstage.c
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@@ -41,6 +41,7 @@
#include "northbridge/amd/amdfam10/reset_test.c"
#include <console/loglevel.h>
#include "cpu/x86/bist.h"
#include <superio/fintek/common/fintek.h>
#include <superio/fintek/f71859/f71859.h>
#include <cpu/amd/mtrr.h>
#include "northbridge/amd/amdfam10/setup_resource_map.c"
@@ -97,7 +98,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
enable_rs780_dev8();
sb7xx_51xx_lpc_init();
f71859_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();