Ron,

Attached is the third revision of the CN400/EPIA-N(L) patch for CB V2.

Patch should work against r4381 (or later ?)

This version now boots all of the way through to attempting to launch a
payload (I'm trying FILO right now), where it falls over with exception
6 (invalid opcode)

The coreboot_table issue seems to have been automagically resolved by
the latest core files.

It may still be that the reason for the payload not starting is down to
some issue with the tables initialising, I'll look closer at that.

Signed-off-by: Jon Harrison <bothlyn@blueyonder.co.uk>

Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4386 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

targets/via/epia-n/Config-abuild.lb

@@ -0,0 +1,21 @@
+# This will make a target directory of ./VENDOR_MAINBOARD
+
+target VENDOR_MAINBOARD
+mainboard VENDOR/MAINBOARD
+
+option CC="CROSSCC"
+option CONFIG_CROSS_COMPILE="CROSS_PREFIX"
+option CONFIG_HOSTCC="CROSS_HOSTCC"
+
+__COMPRESSION__
+__LOGLEVEL__
+
+option CONFIG_ROM_SIZE=512*1024
+
+romimage "fallback" 
+	option CONFIG_USE_FALLBACK_IMAGE=1
+	option CONFIG_ROM_IMAGE_SIZE=0x20000
+	option COREBOOT_EXTRA_VERSION=".0-fallback"
+	payload __PAYLOAD__
+end
+buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback"

targets/via/epia-n/Config.lb

@@ -0,0 +1,50 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008 VIA Technologies, Inc.
+## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA)
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+target via_epia_n
+mainboard via/epia-n
+
+option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=10
+option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=10
+option CONFIG_CONSOLE_SERIAL8250=1
+
+# coreboot C code runs at this location in RAM
+option CONFIG_RAMBASE=0x00004000
+
+#
+# Generate the final ROM like this:
+# cat vgabios bochsbios coreboot.rom > coreboot.rom.final
+#
+#option CONFIG_ROM_SIZE = (512 * 1024) - (64 * 1024) - (64 * 1024)
+
+romimage "image"
+	option COREBOOT_EXTRA_VERSION = "-epia_n"
+	payload ../../../../../payloads/filo/build/filo.elf
+end
+
+romimage "fallback"
+	option COREBOOT_EXTRA_VERSION = "-epia_n-fallback"
+	payload ../../../../../payloads/filo/build/filo.elf
+end
+
+#buildrom ./coreboot.rom CONFIG_ROM_SIZE "image" "fallback"
+#buildrom ./coreboot.rom CONFIG_FALLBACK_SIZE "image" "fallback"
+buildrom ./coreboot.rom CONFIG_FALLBACK_SIZE "fallback"