* split model_centaur into model_c3 and model_c7

* simplify and improve cpuid table
* add speedstep support for VIA C7 based CPUs
* also included as many of Uwe's suggestions as possible

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3168 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/mainboard/via/epia-m/Config.lb

@@ -134,7 +134,7 @@ config chip.h
 chip northbridge/via/vt8623
 
 	device apic_cluster 0 on
-		chip cpu/via/model_centaur
+		chip cpu/via/model_c3
 			device apic 0 on  end 
 		end
 	end

src/mainboard/via/epia/Config.lb

@@ -184,7 +184,7 @@ chip northbridge/via/vt8601
 	end
 
         device apic_cluster 0 on
-                chip cpu/via/model_centaur 
+                chip cpu/via/model_c3
                         device apic 0 on end
                 end
         end