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arch/x86: Combine bootblock linker scripts

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Packing bootblock sections is somewhat easier to understand
when these all appear in one .ld file.

Change-Id: Ie8629a89fa47a28db63ecc33c631b29ac5a77448
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki
2020-04-21 10:29:17 +03:00
committed by Hung-Te Lin
parent c2d6f5f4da
commit cfe526dce2
5 changed files with 23 additions and 41 deletions
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8
src/cpu/intel/fit/fit.ld
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@@ -1,8 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
SECTIONS {
. = 0xffffffc0;
.fit_pointer (.): {
KEEP(*(.fit_pointer))
}
}

12
src/cpu/x86/16bit/entry16.ld
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@@ -1,12 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
gdtptr16_offset = gdtptr16 & 0xffff;
nullidt_offset = nullidt & 0xffff;
/* Symbol _start16bit must be aligned to 4kB to start AP CPUs with
* Startup IPI message without RAM.
*/
#if CONFIG(SIPI_VECTOR_IN_ROM)
_bogus = ASSERT((_start16bit & 0xfff) == 0, "Symbol _start16bit is not at 4 KiB boundary");
ap_sipi_vector_in_rom = (_start16bit >> 12) & 0xff;
#endif

18
src/cpu/x86/16bit/reset16.ld
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@@ -1,18 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* _ROMTOP : The top of the ROM used where we
* need to put the reset vector.
*/
SECTIONS {
/* Trigger an error if I have an unuseable start address */
_bogus = ASSERT(_start16bit >= 0xffff0000, "_start16bit too low. Please report.");
_ROMTOP = 0xfffffff0;
. = _ROMTOP;
.reset . : {
*(.reset);
. = 15;
BYTE(0x00);
}
}