baytrail: initialize perf/power registers

According to the reference code all these registers
need to be set to their best known values.

BUG=chrome-os-partner:24345
BRANCH=None
TEST=Built and booted. Suspend and wake. No idea about
     observable impact yet.

Change-Id: I0e31505a165eee1d177e5d726edcfa6947430476
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179749
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/5008
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

src/soc/intel/baytrail/Makefile.inc

@@ -44,6 +44,7 @@ ramstage-y += emmc.c
 ramstage-y += lpss.c
 ramstage-y += pcie.c
 ramstage-y += sd.c
+ramstage-y += perf_power.c
 
 # Remove as ramstage gets fleshed out
 ramstage-y += placeholders.c