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sb/intel/ibexpeak: Implement PCH function disable in chip_ops

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This does the following:
- implement a PCH disable function that will be called by the PCI
  drivers as part of their chip_ops
- removes the iobp_x calls as those don't exist on ibexpeak
- complete the devicetree with to be disabled PCI devices for the
  chip_ops to be called
- Clean up some code copied from bd82x6x

Change-Id: I78d25ffe9af482c77d397a9fdb4f0127e40baddc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35753
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Arthur Heymans
2019-10-02 00:21:01 +02:00
parent f266dc6174
commit d0310faa3b
7 changed files with 140 additions and 33 deletions
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13
src/southbridge/intel/ibexpeak/lpc.c
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@ -409,11 +409,6 @@ static void enable_clock_gating(struct device *dev)
reg16 |= (1 << 2) | (1 << 11);
pci_write_config16(dev, GEN_PMCON_1, reg16);
pch_iobp_update(0xEB007F07, ~0UL, (1 << 31));
pch_iobp_update(0xEB004000, ~0UL, (1 << 7));
pch_iobp_update(0xEC007F07, ~0UL, (1 << 31));
pch_iobp_update(0xEC004000, ~0UL, (1 << 7));
reg32 = RCBA32(CG);
reg32 |= (1 << 31);
reg32 |= (1 << 29) | (1 << 28);
@ -500,13 +495,7 @@ static void lpc_init(struct device *dev)
pch_power_options(dev);
/* Initialize power management */
switch (pch_silicon_type()) {
case PCH_TYPE_MOBILE5:
mobile5_pm_init (dev);
break;
default:
printk(BIOS_ERR, "Unknown Chipset: 0x%04x\n", dev->device);
}
mobile5_pm_init(dev);
/* Set the state of the GPIO lines. */
//gpio_init(dev);