arch/arm64: Pass cbmem_top to ramstage via calling argument

This solution is very generic and can in principle be implemented on
all arch/soc. Currently the old infrastructure to pass on information
from romstage to ramstage is left in place and will be removed in a
follow-up commit.

Nvidia Tegra will be handled in a separate patch because it has a
custom ramstage entry.

Instead trying to figure out which files can be removed from stages
and which cbmem_top implementations need with preprocessor, rename all
cbmem_top implementation to cbmem_top_romstage.

Mechanisms set in place to pass on information from rom- to ram-stage
will be replaced in a followup commit.

Change-Id: I86cdc5c2fac76797732a3a3398f50c4d1ff6647a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36275
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

src/arch/arm64/Kconfig

@@ -17,6 +17,7 @@ config ARCH_ROMSTAGE_ARM64
 config ARCH_RAMSTAGE_ARM64
 	bool
 	select ARCH_ARM64
+	select RAMSTAGE_CBMEM_TOP_ARG if !SOC_NVIDIA_TEGRA210
 
 source src/arch/arm64/armv8/Kconfig
 

src/arch/arm64/boot.c

@@ -11,6 +11,7 @@
  * GNU General Public License for more details.
  */
 
+#include <cbmem.h>
 #include <arch/cache.h>
 #include <arch/lib_helpers.h>
 #include <arch/stages.h>
@@ -48,7 +49,10 @@ void arch_prog_run(struct prog *prog)
 }
 
 /* Generic stage entry point. Can be overridden by board/SoC if needed. */
-__weak void stage_entry(void)
+__weak void stage_entry(uintptr_t stage_arg)
 {
+	if (!ENV_ROMSTAGE_OR_BEFORE)
+		_cbmem_top_ptr = stage_arg;
+
 	main();
 }

src/arch/arm64/include/arch/stages.h

@@ -17,7 +17,7 @@
 #include <stdint.h>
 #include <main_decl.h>
 
-void stage_entry(void);
+void stage_entry(uintptr_t stage_arg);
 
 /* This function is the romstage platform entry point, and should contain all
    chipset and mainboard setup until DRAM is initialized and accessible. */

src/mainboard/emulation/qemu-aarch64/Makefile.inc

@@ -6,7 +6,6 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 
 romstage-y += cbmem.c
-ramstage-y += cbmem.c
 
 bootblock-y += media.c
 romstage-y += media.c

src/soc/cavium/cn81xx/Makefile.inc

@@ -35,7 +35,6 @@ verstage-y += gpio.c
 verstage-y += timer.c
 verstage-y += spi.c
 verstage-y += uart.c
-verstage-y += cbmem.c
 
 ################################################################################
 # romstage
@@ -65,7 +64,6 @@ ramstage-y += soc.c
 ramstage-y += cpu.c
 ramstage-y += cpu_secondary.S
 ramstage-y += ecam0.c
-ramstage-y += cbmem.c
 
 ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c
 

src/soc/mediatek/mt8173/Makefile.inc

@@ -64,7 +64,7 @@ romstage-y += ../common/rtc.c rtc.c
 
 ################################################################################
 
-ramstage-y += ../common/cbmem.c emi.c
+ramstage-y += emi.c
 ramstage-y += ../common/spi.c spi.c
 ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c
 ramstage-y += soc.c ../common/mtcmos.c

src/soc/mediatek/mt8183/Makefile.inc

@@ -45,7 +45,7 @@ romstage-y += ../common/uart.c
 romstage-y += ../common/wdt.c
 
 ramstage-y += auxadc.c
-ramstage-y += ../common/cbmem.c emi.c
+ramstage-y += emi.c
 ramstage-y += ../common/ddp.c ddp.c
 ramstage-y += ../common/dsi.c dsi.c
 ramstage-y += ../common/gpio.c gpio.c

src/soc/qualcomm/qcs405/Makefile.inc

@@ -39,7 +39,6 @@ romstage-y += blsp.c
 ramstage-y += soc.c
 ramstage-y += timer.c
 ramstage-y += spi.c
-ramstage-y += cbmem.c
 ramstage-y += gpio.c
 ramstage-y += clock.c
 ramstage-y += i2c.c

src/soc/qualcomm/sc7180/Makefile.inc

@@ -28,7 +28,6 @@ romstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
 
 ################################################################################
 ramstage-y += soc.c
-ramstage-y += cbmem.c
 ramstage-y += timer.c
 ramstage-y += spi.c
 ramstage-y += gpio.c

src/soc/qualcomm/sdm845/Makefile.inc

@@ -33,7 +33,6 @@ romstage-y += mmu.c
 ################################################################################
 ramstage-y += soc.c
 ramstage-y += spi.c
-ramstage-y += cbmem.c
 ramstage-y += timer.c
 ramstage-y += gpio.c
 ramstage-y += clock.c

src/soc/rockchip/rk3399/Makefile.inc

@@ -31,7 +31,6 @@ bootblock-y += gpio.c
 bootblock-y += saradc.c
 bootblock-y += timer.c
 
-verstage-y += ../common/cbmem.c
 verstage-y += ../common/gpio.c
 verstage-y += gpio.c
 verstage-y += sdram.c
@@ -59,7 +58,6 @@ romstage-y += ../common/i2c.c
 
 ################################################################################
 
-ramstage-y += ../common/cbmem.c
 ramstage-y += sdram.c
 ramstage-y += ../common/spi.c
 ramstage-y += ../common/uart.c