mb/siemens/mc_ehl3/devicetree.cb: Disable USB 3.0 port 1
It's been decided not to use the USB 3.0 port 1 on this board anymore, so disable it also with the corresponding USB 2.0 lane. BUG=none TEST=USB 3.0 port 1 not functional anymore after boot, while others continue working. Change-Id: I2799e3d9d7232743c9480dd9611d94ed3249f53b Signed-off-by: Jan Samek <jan.samek@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75702 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
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		@@ -21,7 +21,7 @@ chip soc/intel/elkhartlake
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	# USB related UPDs
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						# USB related UPDs
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	register "usb2_ports[0]" = "USB2_PORT_MID(OC2)"	# X125/X135
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						register "usb2_ports[0]" = "USB2_PORT_MID(OC2)"	# X125/X135
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	register "usb2_ports[1]" = "USB2_PORT_MID(OC2)"	# X125/X135
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						register "usb2_ports[1]" = "USB2_PORT_EMPTY"	# UNUSED
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	register "usb2_ports[2]" = "USB2_PORT_MID(OC0)"	# X145/X155
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						register "usb2_ports[2]" = "USB2_PORT_MID(OC0)"	# X145/X155
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	register "usb2_ports[3]" = "USB2_PORT_MID(OC0)"	# X145/X155
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						register "usb2_ports[3]" = "USB2_PORT_MID(OC0)"	# X145/X155
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	register "usb2_ports[4]" = "USB2_PORT_MID(OC3)"	# USB Panel
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						register "usb2_ports[4]" = "USB2_PORT_MID(OC3)"	# USB Panel
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@@ -32,7 +32,7 @@ chip soc/intel/elkhartlake
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	register "usb2_ports[9]" = "USB2_PORT_EMPTY"
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						register "usb2_ports[9]" = "USB2_PORT_EMPTY"
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	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# USB3/2 Type A port1
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						register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# USB3/2 Type A port1
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	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# USB3/2 Type A port2
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						register "usb3_ports[1]" = "USB3_PORT_EMPTY"	# UNUSED
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	register "usb3_ports[2]" = "USB3_PORT_EMPTY"	# UNUSED
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						register "usb3_ports[2]" = "USB3_PORT_EMPTY"	# UNUSED
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	register "usb3_ports[3]" = "USB3_PORT_EMPTY"	# UNUSED
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						register "usb3_ports[3]" = "USB3_PORT_EMPTY"	# UNUSED
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