soc/intel: Use correct terminology for SPI flash operations

FPR is an attribute of the SPI flash component and not of the SPI bus
itself. Rename functions, file names and Kconfig option to make sure
this is conveyed correctly.

BUG=None
BRANCH=None
TEST=Compiles successfully.

Change-Id: I9f06f1a8ee28b8c56db64ddd6a19dd9179c54f50
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17560
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh
2016-11-21 09:19:53 -08:00
committed by Furquan Shaikh
parent d2fb6ae813
commit d0c00052d3
9 changed files with 17 additions and 12 deletions

View File

@@ -52,7 +52,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_LPSS_I2C
select SOC_INTEL_COMMON_SMI
select SOC_INTEL_COMMON_SPI_PROTECT
select SOC_INTEL_COMMON_SPI_FLASH_PROTECT
select UDELAY_TSC
select TSC_CONSTANT_RATE
select TSC_MONOTONIC_TIMER