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src/drivers: Drop unneeded empty lines

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Change-Id: I202e5d285612b9bf237b588ea3c006187623fdc3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44609
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Elyes HAOUAS
2020-08-19 21:51:08 +02:00
committed by Michael Niewöhner
parent 490546f191
commit d161a2fafd
46 changed files with 0 additions and 75 deletions
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1
src/drivers/amd/agesa/heapmanager.c
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@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <AGESA.h> #include <AGESA.h>
#include <amdlib.h> #include <amdlib.h>

1
src/drivers/analogix/anx7625/anx7625.c
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@ -737,7 +737,6 @@ static int anx7625_power_on_init(uint8_t bus)
} }
ANXINFO("Init interface.\n"); ANXINFO("Init interface.\n");
anx7625_disable_pd_protocol(bus); anx7625_disable_pd_protocol(bus);
anx7625_reg_read(bus, RX_P0_ADDR, OCM_FW_VERSION, &version); anx7625_reg_read(bus, RX_P0_ADDR, OCM_FW_VERSION, &version);
anx7625_reg_read(bus, RX_P0_ADDR, OCM_FW_REVERSION, &revision); anx7625_reg_read(bus, RX_P0_ADDR, OCM_FW_REVERSION, &revision);

1
src/drivers/aspeed/common/ast_dp501.c
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@ -331,7 +331,6 @@ static bool ast_init_dvo(struct drm_device *dev)
return true; return true;
} }
static void ast_init_analog(struct drm_device *dev) static void ast_init_analog(struct drm_device *dev)
{ {
struct ast_private *ast = dev->dev_private; struct ast_private *ast = dev->dev_private;

1
src/drivers/aspeed/common/ast_drv.h
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@ -11,7 +11,6 @@
#define PCI_CHIP_AST2100 0x2010 #define PCI_CHIP_AST2100 0x2010
#define PCI_CHIP_AST1180 0x1180 #define PCI_CHIP_AST1180 0x1180
enum ast_chip { enum ast_chip {
AST2000, AST2000,
AST2100, AST2100,

1
src/drivers/aspeed/common/ast_mode.c
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@ -6,7 +6,6 @@
#include "ast_drv.h" #include "ast_drv.h"
#include "ast_tables.h" #include "ast_tables.h"
static inline void ast_load_palette_index(struct ast_private *ast, static inline void ast_load_palette_index(struct ast_private *ast,
u8 index, u8 red, u8 green, u8 index, u8 red, u8 green,
u8 blue) u8 blue)

7
src/drivers/aspeed/common/ast_post.c
View File

@ -25,7 +25,6 @@ void ast_enable_mmio(struct drm_device *dev)
ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04); ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04);
} }
bool ast_is_vga_enabled(struct drm_device *dev) bool ast_is_vga_enabled(struct drm_device *dev)
{ {
struct ast_private *ast = dev->dev_private; struct ast_private *ast = dev->dev_private;
@ -208,7 +207,6 @@ static int cbrscan_ast2150(struct ast_private *ast, int busw)
return 1; return 1;
} }
static void cbrdlli_ast2150(struct ast_private *ast, int busw) static void cbrdlli_ast2150(struct ast_private *ast, int busw)
{ {
u32 dll_min[4], dll_max[4], dlli, data, passcnt; u32 dll_min[4], dll_max[4], dlli, data, passcnt;
@ -239,8 +237,6 @@ cbr_start:
ast_moutdwm(ast, 0x1e6e0068, dlli | (dlli << 8) | (dlli << 16) | (dlli << 24)); ast_moutdwm(ast, 0x1e6e0068, dlli | (dlli << 8) | (dlli << 16) | (dlli << 24));
} }
static void ast_init_dram_reg(struct drm_device *dev) static void ast_init_dram_reg(struct drm_device *dev)
{ {
struct ast_private *ast = dev->dev_private; struct ast_private *ast = dev->dev_private;
@ -479,7 +475,6 @@ static u32 mmc_test2(struct ast_private *ast, u32 datagen, u8 test_ctl)
return data; return data;
} }
static bool mmc_test_burst(struct ast_private *ast, u32 datagen) static bool mmc_test_burst(struct ast_private *ast, u32 datagen)
{ {
return mmc_test(ast, datagen, 0xc1); return mmc_test(ast, datagen, 0xc1);
@ -1231,7 +1226,6 @@ ddr3_init_start:
ast_moutdwm(ast, 0x1E6E0050, 0x00000000); ast_moutdwm(ast, 0x1E6E0050, 0x00000000);
#endif #endif
} }
static void get_ddr2_info(struct ast_private *ast, struct ast2300_dram_param *param) static void get_ddr2_info(struct ast_private *ast, struct ast2300_dram_param *param)
@ -1246,7 +1240,6 @@ static void get_ddr2_info(struct ast_private *ast, struct ast2300_dram_param *pa
trap_AC2 += 0x00110000; trap_AC2 += 0x00110000;
trap_MRS = 0x00000040 | (trap << 4); trap_MRS = 0x00000040 | (trap << 4);
param->reg_MADJ = 0x00034C4C; param->reg_MADJ = 0x00034C4C;
param->reg_SADJ = 0x00001800; param->reg_SADJ = 0x00001800;
param->reg_DRV = 0x000000F0; param->reg_DRV = 0x000000F0;

2
src/drivers/aspeed/common/ast_tables.h
View File

@ -220,7 +220,6 @@ static const struct ast_vbios_enhtable res_800x600[] = {
(SyncPP | Charx8Dot), 0xFF, 5, 0x30 }, (SyncPP | Charx8Dot), 0xFF, 5, 0x30 },
}; };
static const struct ast_vbios_enhtable res_1024x768[] = { static const struct ast_vbios_enhtable res_1024x768[] = {
{1344, 1024, 24, 136, 806, 768, 3, 6, VCLK65, /* 60Hz */ {1344, 1024, 24, 136, 806, 768, 3, 6, VCLK65, /* 60Hz */
(SyncNN | Charx8Dot), 60, 1, 0x31 }, (SyncNN | Charx8Dot), 60, 1, 0x31 },
@ -280,7 +279,6 @@ static const struct ast_vbios_enhtable res_1920x1080[] = {
AST2500PreCatchCRT), 0xFF, 1, 0x38 }, AST2500PreCatchCRT), 0xFF, 1, 0x38 },
}; };
/* 16:10 */ /* 16:10 */
static const struct ast_vbios_enhtable res_1280x800[] = { static const struct ast_vbios_enhtable res_1280x800[] = {
{1440, 1280, 48, 32, 823, 800, 3, 6, VCLK71, /* 60Hz RB */ {1440, 1280, 48, 32, 823, 800, 3, 6, VCLK71, /* 60Hz RB */

2
src/drivers/crb/tis.c
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@ -30,7 +30,6 @@ static const char *tis_get_dev_name(struct tpm2_info *info)
return "Unknown"; return "Unknown";
} }
int tis_open(void) int tis_open(void)
{ {
if (tpm_is_open) { if (tpm_is_open) {
@ -79,7 +78,6 @@ int tis_init(void)
return 0; return 0;
} }
int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size, uint8_t *recvbuf, size_t *rbuf_len) int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size, uint8_t *recvbuf, size_t *rbuf_len)
{ {
int len = tpm2_process_command(sendbuf, sbuf_size, recvbuf, *rbuf_len); int len = tpm2_process_command(sendbuf, sbuf_size, recvbuf, *rbuf_len);

3
src/drivers/crb/tpm.c
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@ -121,7 +121,6 @@ static uint8_t crb_activate_locality(void)
if (rc) if (rc)
write8(CRB_REG(locality, CRB_REG_LOC_CTRL), LOC_CTRL_REQ_ACCESS); write8(CRB_REG(locality, CRB_REG_LOC_CTRL), LOC_CTRL_REQ_ACCESS);
rc = crb_wait_for_reg32(CRB_REG(locality, CRB_REG_LOC_STATE), 750, LOC_STATE_LOC_ASSIGN, rc = crb_wait_for_reg32(CRB_REG(locality, CRB_REG_LOC_STATE), 750, LOC_STATE_LOC_ASSIGN,
LOC_STATE_LOC_ASSIGN); LOC_STATE_LOC_ASSIGN);
if (rc) { if (rc) {
@ -137,7 +136,6 @@ static uint8_t crb_activate_locality(void)
return 0; return 0;
} }
return locality; return locality;
} }
@ -176,7 +174,6 @@ static int crb_switch_to_ready(void)
int tpm2_init(void) int tpm2_init(void)
{ {
if (crb_probe()) { if (crb_probe()) {
printk(BIOS_ERR, "TPM: Probe failed.\n"); printk(BIOS_ERR, "TPM: Probe failed.\n");
return -1; return -1;

2
src/drivers/crb/tpm.h
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@ -39,7 +39,6 @@
#define CRB_INTF_REG_INTF_SEL (1<<17) #define CRB_INTF_REG_INTF_SEL (1<<17)
#define CRB_INTF_REG_INTF_LOCK (1<<19) #define CRB_INTF_REG_INTF_LOCK (1<<19)
/*REQUEST Register related */ /*REQUEST Register related */
#define CRB_REG_REQUEST_CMD_RDY 0x01 #define CRB_REG_REQUEST_CMD_RDY 0x01
#define CRB_REG_REQUEST_GO_IDLE 0x02 #define CRB_REG_REQUEST_GO_IDLE 0x02
@ -58,7 +57,6 @@ struct tpm2_info {
uint16_t revision; uint16_t revision;
}; };
int tpm2_init(void); int tpm2_init(void);
void tpm2_get_info(struct tpm2_info *tpm2_info); void tpm2_get_info(struct tpm2_info *tpm2_info);
size_t tpm2_process_command(const void *tpm2_command, size_t command_size, size_t tpm2_process_command(const void *tpm2_command, size_t command_size,

1
src/drivers/elog/elog.c
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@ -17,7 +17,6 @@
#include <elog.h> #include <elog.h>
#include "elog_internal.h" #include "elog_internal.h"
#if CONFIG(ELOG_DEBUG) #if CONFIG(ELOG_DEBUG)
#define elog_debug(STR...) printk(BIOS_DEBUG, STR) #define elog_debug(STR...) printk(BIOS_DEBUG, STR)
#else #else

1
src/drivers/emulation/qemu/cirrus.c
View File

@ -299,7 +299,6 @@ static void cirrus_init_linear_fb(struct device *dev)
vga_sr_write (CIRRUS_SR_EXTENDED_MODE, sr_ext); vga_sr_write (CIRRUS_SR_EXTENDED_MODE, sr_ext);
write_hidden_dac (hidden_dac); write_hidden_dac (hidden_dac);
struct edid edid; struct edid edid;
edid.mode.ha = width; edid.mode.ha = width;
edid.mode.va = height; edid.mode.va = height;

1
src/drivers/generic/cbfs-serial/cbfs-serial.c
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@ -5,7 +5,6 @@
#include <smbios.h> #include <smbios.h>
#include <string.h> #include <string.h>
#define MAX_SERIAL_LENGTH 0x100 #define MAX_SERIAL_LENGTH 0x100
const char *smbios_mainboard_serial_number(void) const char *smbios_mainboard_serial_number(void)

1
src/drivers/i2c/at24rf08c/lenovo_serials.c
View File

@ -113,7 +113,6 @@ void smbios_system_set_uuid(u8 *uuid)
3, 2, 1, 0, 5, 4, 7, 6, 8, 9, 10, 11, 12, 13, 14, 15 3, 2, 1, 0, 5, 4, 7, 6, 8, 9, 10, 11, 12, 13, 14, 15
}; };
if (already_read) { if (already_read) {
memcpy(uuid, result, 16); memcpy(uuid, result, 16);
return; return;

1
src/drivers/i2c/ck505/ck505.c
View File

@ -31,7 +31,6 @@ static void ck505_init(struct device *dev)
nregs = MIN(MIN(dev_nregs, config->nregs == 0 ? SMBUS_BLOCK_SIZE nregs = MIN(MIN(dev_nregs, config->nregs == 0 ? SMBUS_BLOCK_SIZE
: config->nregs), ARRAY_SIZE(config->mask)); : config->nregs), ARRAY_SIZE(config->mask));
printk(BIOS_DEBUG, "Changing %d of the %d ck505 config bytes.\n", printk(BIOS_DEBUG, "Changing %d of the %d ck505 config bytes.\n",
nregs, dev_nregs); nregs, dev_nregs);

1
src/drivers/i2c/designware/dw_i2c.c
View File

@ -698,7 +698,6 @@ static int dw_i2c_set_speed(unsigned int bus, enum i2c_speed speed,
return 0; return 0;
} }
/* /*
* Initialize this bus controller and set the speed. * Initialize this bus controller and set the speed.
* *

1
src/drivers/i2c/pca9538/chip.h
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@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
struct drivers_i2c_pca9538_config { struct drivers_i2c_pca9538_config {
unsigned char in_out; /* Use bit as input(1) or output (0). */ unsigned char in_out; /* Use bit as input(1) or output (0). */
unsigned char invert; /* If a bit is 1, the input will be inverted. */ unsigned char invert; /* If a bit is 1, the input will be inverted. */

1
src/drivers/i2c/ptn3460/ptn3460.c
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@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h> #include <console/console.h>
#include <device/i2c_bus.h> #include <device/i2c_bus.h>
#include <types.h> #include <types.h>

1
src/drivers/i2c/rt1011/chip.h
View File

@ -4,7 +4,6 @@
* Realtek RT1011 audio codec devicetree bindings * Realtek RT1011 audio codec devicetree bindings
*/ */
struct drivers_i2c_rt1011_config { struct drivers_i2c_rt1011_config {
const char *name; /* ACPI Device Name */ const char *name; /* ACPI Device Name */
const char *desc; /* Device Description */ const char *desc; /* Device Description */

1
src/drivers/i2c/tpm/tpm.c
View File

@ -15,7 +15,6 @@
* Version: 2.1.1 * Version: 2.1.1
*/ */
#include <commonlib/endian.h> #include <commonlib/endian.h>
#include <string.h> #include <string.h>
#include <types.h> #include <types.h>

1
src/drivers/i2c/ww_ring/ww_ring.c
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@ -365,7 +365,6 @@ int ww_ring_display_pattern(unsigned int i2c_bus, enum display_pattern pattern)
return -1; return -1;
} }
#define LP55231_I2C_BASE_ADDR 0x32 #define LP55231_I2C_BASE_ADDR 0x32
static void ww_ring_init(unsigned int i2c_bus) static void ww_ring_init(unsigned int i2c_bus)

1
src/drivers/intel/fsp1_1/fsp_util.c
View File

@ -174,7 +174,6 @@ struct fsp_runtime {
uint32_t hob_list; uint32_t hob_list;
} __packed; } __packed;
void fsp_set_runtime(FSP_INFO_HEADER *fih, void *hob_list) void fsp_set_runtime(FSP_INFO_HEADER *fih, void *hob_list)
{ {
struct fsp_runtime *fspr; struct fsp_runtime *fspr;

1
src/drivers/intel/fsp1_1/include/fsp/util.h
View File

@ -85,7 +85,6 @@ void *get_first_hob(uint16_t type);
void *get_next_guid_hob(const EFI_GUID *guid, const void *hob_start); void *get_next_guid_hob(const EFI_GUID *guid, const void *hob_start);
void *get_first_guid_hob(const EFI_GUID *guid); void *get_first_guid_hob(const EFI_GUID *guid);
asmlinkage void chipset_teardown_car_main(void); asmlinkage void chipset_teardown_car_main(void);
#endif /* FSP1_1_UTIL_H */ #endif /* FSP1_1_UTIL_H */

1
src/drivers/intel/fsp2_0/include/fsp/api.h
View File

@ -31,7 +31,6 @@ enum fsp_notify_phase {
END_OF_FIRMWARE = 0xF0 END_OF_FIRMWARE = 0xF0
}; };
/* Main FSP stages */ /* Main FSP stages */
void fsp_memory_init(bool s3wake); void fsp_memory_init(bool s3wake);
void fsp_silicon_init(bool s3wake); void fsp_silicon_init(bool s3wake);

1
src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
View File

@ -31,7 +31,6 @@
#include <FirmwareVersionInfoHob.h> #include <FirmwareVersionInfoHob.h>
#endif #endif
#pragma pack(pop) #pragma pack(pop)
#endif #endif

10
src/drivers/intel/gma/i915_reg.h
View File

@ -27,7 +27,6 @@
#define IVB_GMCH_GMS_SHIFT 4 #define IVB_GMCH_GMS_SHIFT 4
#define IVB_GMCH_GMS_MASK 0xf #define IVB_GMCH_GMS_MASK 0xf
/* PCI config space */ /* PCI config space */
#define HPLLCC 0xc0 /* 855 only */ #define HPLLCC 0xc0 /* 855 only */
@ -296,7 +295,6 @@
#define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1<<0) #define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1<<0)
#define PIPE_CONTROL_GLOBAL_GTT (1<<2) /* in addr dword */ #define PIPE_CONTROL_GLOBAL_GTT (1<<2) /* in addr dword */
/* /*
* Reset registers * Reset registers
*/ */
@ -791,7 +789,6 @@
#define ILK_FBCQ_DIS (1<<22) #define ILK_FBCQ_DIS (1<<22)
#define ILK_PABSTRETCH_DIS (1<<21) #define ILK_PABSTRETCH_DIS (1<<21)
/* /*
* Framebuffer compression for Sandybridge * Framebuffer compression for Sandybridge
* *
@ -801,7 +798,6 @@
#define SNB_CPU_FENCE_ENABLE (1<<29) #define SNB_CPU_FENCE_ENABLE (1<<29)
#define DPFC_CPU_FENCE_OFFSET 0x100104 #define DPFC_CPU_FENCE_OFFSET 0x100104
/* /*
* GPIO regs * GPIO regs
*/ */
@ -1213,7 +1209,6 @@
HSW_CXT_RENDER_SIZE(ctx_reg) + \ HSW_CXT_RENDER_SIZE(ctx_reg) + \
GEN7_CXT_VFSTATE_SIZE(ctx_reg)) GEN7_CXT_VFSTATE_SIZE(ctx_reg))
/* /*
* Overlay regs * Overlay regs
*/ */
@ -1254,7 +1249,6 @@
#define _BCLRPAT_B 0x61020 #define _BCLRPAT_B 0x61020
#define _VSYNCSHIFT_B 0x61028 #define _VSYNCSHIFT_B 0x61028
#define HTOTAL(trans) _TRANSCODER(trans, _HTOTAL_A, _HTOTAL_B) #define HTOTAL(trans) _TRANSCODER(trans, _HTOTAL_A, _HTOTAL_B)
#define HBLANK(trans) _TRANSCODER(trans, _HBLANK_A, _HBLANK_B) #define HBLANK(trans) _TRANSCODER(trans, _HBLANK_A, _HBLANK_B)
#define HSYNC(trans) _TRANSCODER(trans, _HSYNC_A, _HSYNC_B) #define HSYNC(trans) _TRANSCODER(trans, _HSYNC_A, _HSYNC_B)
@ -1311,7 +1305,6 @@
#define ADPA_DPMS_STANDBY (2<<10) #define ADPA_DPMS_STANDBY (2<<10)
#define ADPA_DPMS_OFF (3<<10) #define ADPA_DPMS_OFF (3<<10)
/* Hotplug control (945+ only) */ /* Hotplug control (945+ only) */
#define PORT_HOTPLUG_EN 0x61110 #define PORT_HOTPLUG_EN 0x61110
#define HDMIB_HOTPLUG_INT_EN (1 << 29) #define HDMIB_HOTPLUG_INT_EN (1 << 29)
@ -2808,7 +2801,6 @@
#define _PIPEB_FRMCOUNT_GM45 0x71040 #define _PIPEB_FRMCOUNT_GM45 0x71040
#define _PIPEB_FLIPCOUNT_GM45 0x71044 #define _PIPEB_FLIPCOUNT_GM45 0x71044
/* Display B control */ /* Display B control */
#define _DSPBCNTR 0x71180 #define _DSPBCNTR 0x71180
#define DISPPLANE_ALPHA_TRANS_ENABLE (1<<15) #define DISPPLANE_ALPHA_TRANS_ENABLE (1<<15)
@ -3011,7 +3003,6 @@
#define FDI_PLL_FREQ_LOCK_LIMIT_MASK 0xfff00 #define FDI_PLL_FREQ_LOCK_LIMIT_MASK 0xfff00
#define FDI_PLL_FREQ_DISABLE_COUNT_LIMIT_MASK 0xff #define FDI_PLL_FREQ_DISABLE_COUNT_LIMIT_MASK 0xff
#define _PIPEA_DATA_M1 0x60030 #define _PIPEA_DATA_M1 0x60030
#define TU_SIZE(x) (((x)-1) << 25) /* default size 64 */ #define TU_SIZE(x) (((x)-1) << 25) /* default size 64 */
#define TU_SIZE_MASK 0x7e000000 #define TU_SIZE_MASK 0x7e000000
@ -3565,7 +3556,6 @@
#define TRANS_CHICKEN2(pipe) _PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2) #define TRANS_CHICKEN2(pipe) _PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2)
#define TRANS_CHICKEN2_TIMING_OVERRIDE (1UL<<31) #define TRANS_CHICKEN2_TIMING_OVERRIDE (1UL<<31)
#define SOUTH_CHICKEN1 0xc2000 #define SOUTH_CHICKEN1 0xc2000
#define FDIA_PHASE_SYNC_SHIFT_OVR 19 #define FDIA_PHASE_SYNC_SHIFT_OVR 19
#define FDIA_PHASE_SYNC_SHIFT_EN 18 #define FDIA_PHASE_SYNC_SHIFT_EN 18

1
src/drivers/intel/gma/int15.c
View File

@ -98,7 +98,6 @@ int intel_vga_int15_handler(void)
return res; return res;
} }
void install_intel_vga_int15_handler(int active_lfp_, int pfit_, int display_, int panel_type_) void install_intel_vga_int15_handler(int active_lfp_, int pfit_, int display_, int panel_type_)
{ {
active_lfp = active_lfp_; active_lfp = active_lfp_;

1
src/drivers/intel/gma/int15.h
View File

@ -27,7 +27,6 @@ enum {
GMA_INT15_ACTIVE_LFP_EDP = 0x03, GMA_INT15_ACTIVE_LFP_EDP = 0x03,
}; };
#if CONFIG(VGA_ROM_RUN) #if CONFIG(VGA_ROM_RUN)
/* Install custom int15 handler for VGA OPROM */ /* Install custom int15 handler for VGA OPROM */
void install_intel_vga_int15_handler(int active_lfp, int pfit, int display, int panel_type); void install_intel_vga_int15_handler(int active_lfp, int pfit, int display, int panel_type);

1
src/drivers/intel/gma/intel_bios.h
View File

@ -396,7 +396,6 @@ struct bdb_sdvo_lvds_options {
u8 panel_misc_bits_4; u8 panel_misc_bits_4;
} __packed; } __packed;
#define BDB_DRIVER_FEATURE_NO_LVDS 0 #define BDB_DRIVER_FEATURE_NO_LVDS 0
#define BDB_DRIVER_FEATURE_INT_LVDS 1 #define BDB_DRIVER_FEATURE_INT_LVDS 1
#define BDB_DRIVER_FEATURE_SDVO_LVDS 2 #define BDB_DRIVER_FEATURE_SDVO_LVDS 2

1
src/drivers/intel/i210/i210.h
View File

@ -16,7 +16,6 @@
#define I210_DONE 0x02 /* command done bit */ #define I210_DONE 0x02 /* command done bit */
#define I210_TARGET_CHECKSUM 0xBABA /* resulting checksum */ #define I210_TARGET_CHECKSUM 0xBABA /* resulting checksum */
/*define some other useful values here */ /*define some other useful values here */
#define I210_POLL_TIMEOUT_US 300000 /* 300 ms */ #define I210_POLL_TIMEOUT_US 300000 /* 300 ms */
/*Define some error states here*/ /*Define some error states here*/

1
src/drivers/ipmi/ipmi_kcs.c
View File

@ -53,7 +53,6 @@ static int wait_obf_timeout(int port)
} }
} }
static int ipmi_kcs_send_data_byte(int port, const unsigned char byte) static int ipmi_kcs_send_data_byte(int port, const unsigned char byte)
{ {
unsigned char status; unsigned char status;

3
src/drivers/net/ne2k.c
View File

@ -36,7 +36,6 @@ SMC8416 PIO support added by Andrew Bettison (andrewb@zip.com.au) on 4/3/02
#include "ns8390.h" #include "ns8390.h"
#define ETH_ALEN 6 /* Size of Ethernet address */ #define ETH_ALEN 6 /* Size of Ethernet address */
#define ETH_HLEN 14 /* Size of ethernet header */ #define ETH_HLEN 14 /* Size of ethernet header */
#define ETH_ZLEN 60 /* Minimum packet */ #define ETH_ZLEN 60 /* Minimum packet */
@ -48,7 +47,6 @@ SMC8416 PIO support added by Andrew Bettison (andrewb@zip.com.au) on 4/3/02
#define TX_START 64 #define TX_START 64
#define RX_START (64 + D8390_TXBUF_SIZE) #define RX_START (64 + D8390_TXBUF_SIZE)
static unsigned int get_count(unsigned int eth_nic_base) static unsigned int get_count(unsigned int eth_nic_base)
{ {
unsigned int ret; unsigned int ret;
@ -146,7 +144,6 @@ static void str2mac(const char *str, unsigned char *mac)
} while (c != '\0'); } while (c != '\0');
} }
static void ns8390_tx_header(unsigned int eth_nic_base, int pktlen) static void ns8390_tx_header(unsigned int eth_nic_base, int pktlen)
{ {
unsigned short chksum; unsigned short chksum;

1
src/drivers/pc80/pc/i8254.c
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@ -77,7 +77,6 @@ unsigned long calibrate_tsc_with_pit(void)
if (end.hi) if (end.hi)
goto bad_ctc; goto bad_ctc;
/* Error: ECPUTOOSLOW */ /* Error: ECPUTOOSLOW */
if (end.lo <= CALIBRATE_DIVISOR) if (end.lo <= CALIBRATE_DIVISOR)
goto bad_ctc; goto bad_ctc;

1
src/drivers/pc80/pc/isa-dma.c
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@ -32,7 +32,6 @@
#define DMA_AUTOINIT 0x10 #define DMA_AUTOINIT 0x10
void isa_dma_init(void) void isa_dma_init(void)
{ {
/* slave at 0x00 - 0x0f */ /* slave at 0x00 - 0x0f */

4
src/drivers/pc80/pc/spkmodem.c
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@ -5,7 +5,6 @@
#define SPEAKER_PIT_FREQUENCY 0x1234dd #define SPEAKER_PIT_FREQUENCY 0x1234dd
enum { enum {
PIT_COUNTER_0 = 0x40, PIT_COUNTER_0 = 0x40,
PIT_COUNTER_1 = 0x41, PIT_COUNTER_1 = 0x41,
@ -14,7 +13,6 @@ enum {
PIT_SPEAKER_PORT = 0x61, PIT_SPEAKER_PORT = 0x61,
}; };
enum { enum {
PIT_SPK_TMR2 = 0x01, PIT_SPK_TMR2 = 0x01,
PIT_SPK_DATA = 0x02, PIT_SPK_DATA = 0x02,
@ -44,13 +42,11 @@ enum {
PIT_CTRL_HARDSTROBE = 0x0a, PIT_CTRL_HARDSTROBE = 0x0a,
PIT_CTRL_COUNT_MASK = 0x01, PIT_CTRL_COUNT_MASK = 0x01,
PIT_CTRL_COUNT_BINARY = 0x00, PIT_CTRL_COUNT_BINARY = 0x00,
PIT_CTRL_COUNT_BCD = 0x01 PIT_CTRL_COUNT_BCD = 0x01
}; };
static void static void
make_tone(uint16_t freq_count, unsigned int duration) make_tone(uint16_t freq_count, unsigned int duration)
{ {

1
src/drivers/pc80/rtc/option.c
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@ -228,7 +228,6 @@ int cmos_lb_cks_valid(void)
return cmos_checksum_valid(LB_CKS_RANGE_START, LB_CKS_RANGE_END, LB_CKS_LOC); return cmos_checksum_valid(LB_CKS_RANGE_START, LB_CKS_RANGE_END, LB_CKS_LOC);
} }
void sanitize_cmos(void) void sanitize_cmos(void)
{ {
const unsigned char *cmos_default; const unsigned char *cmos_default;

2
src/drivers/spi/spi_flash.c
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@ -373,7 +373,6 @@ static const struct spi_flash_part_id *find_part(const struct spi_flash_vendor_i
[1] = id[1] & vi->match_id_mask[1], [1] = id[1] & vi->match_id_mask[1],
}; };
for (i = 0; i < vi->nr_part_ids; i++) { for (i = 0; i < vi->nr_part_ids; i++) {
const struct spi_flash_part_id *part = &vi->ids[i]; const struct spi_flash_part_id *part = &vi->ids[i];
@ -666,7 +665,6 @@ void lb_spi_flash(struct lb_header *header)
} }
} }
int spi_flash_ctrlr_protect_region(const struct spi_flash *flash, int spi_flash_ctrlr_protect_region(const struct spi_flash *flash,
const struct region *region, const struct region *region,
const enum ctrlr_prot_type type) const enum ctrlr_prot_type type)

1
src/drivers/spi/spi_sdcard.c
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@ -358,7 +358,6 @@ static int spi_sdcard_do_app_command(const struct spi_sdcard *card,
return spi_sdcard_do_command_help(card, 1, cmd, argument, out_register); return spi_sdcard_do_command_help(card, 1, cmd, argument, out_register);
} }
size_t spi_sdcard_size(const struct spi_sdcard *card) size_t spi_sdcard_size(const struct spi_sdcard *card)
{ {
int wait; int wait;

1
src/drivers/spi/tpm/tis.c
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@ -75,7 +75,6 @@ int tis_init(void)
return 0; return 0;
} }
int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size, int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size,
uint8_t *recvbuf, size_t *rbuf_len) uint8_t *recvbuf, size_t *rbuf_len)
{ {

1
src/drivers/spi/tpm/tpm.h
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@ -32,7 +32,6 @@ struct cr50_firmware_version {
*/ */
int tpm2_init(struct spi_slave *spi_if); int tpm2_init(struct spi_slave *spi_if);
/* /*
* Each command processing consists of sending the command to the TPM, by * Each command processing consists of sending the command to the TPM, by
* writing it into the FIFO register, then polling the status register until * writing it into the FIFO register, then polling the status register until

1
src/drivers/uart/oxpcie.c
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@ -26,7 +26,6 @@ static void oxford_oxpcie_enable(struct device *dev)
printk(BIOS_DEBUG, "OXPCIe952: UART BAR: 0x%x\n", (u32)res->base); printk(BIOS_DEBUG, "OXPCIe952: UART BAR: 0x%x\n", (u32)res->base);
} }
static void oxford_oxpcie_set_resources(struct device *dev) static void oxford_oxpcie_set_resources(struct device *dev)
{ {
pci_dev_set_resources(dev); pci_dev_set_resources(dev);

1
src/drivers/usb/ehci.h
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@ -40,7 +40,6 @@ struct ehci_caps {
u8 portroute[8]; /* nibbles for routing - offset 0xC */ u8 portroute[8]; /* nibbles for routing - offset 0xC */
} __packed; } __packed;
/* Section 2.3 Host Controller Operational Registers */ /* Section 2.3 Host Controller Operational Registers */
struct ehci_regs { struct ehci_regs {

3
src/drivers/usb/ehci_debug.c
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@ -421,8 +421,6 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port)
return -1; //-ENOTCONN; return -1; //-ENOTCONN;
} }
static int usbdebug_init_(uintptr_t ehci_bar, unsigned int offset, struct ehci_debug_info *info) static int usbdebug_init_(uintptr_t ehci_bar, unsigned int offset, struct ehci_debug_info *info)
{ {
struct ehci_caps *ehci_caps; struct ehci_caps *ehci_caps;
@ -549,7 +547,6 @@ try_next_port:
} }
dprintk(BIOS_INFO, "EHCI done waiting for port.\n"); dprintk(BIOS_INFO, "EHCI done waiting for port.\n");
/* Enable the debug port */ /* Enable the debug port */
ctrl = read32(&ehci_debug->control); ctrl = read32(&ehci_debug->control);
ctrl |= DBGP_CLAIM; ctrl |= DBGP_CLAIM;

2
src/drivers/usb/gadget.c
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@ -17,7 +17,6 @@
#define USB_HUB_C_PORT_CONNECTION 16 #define USB_HUB_C_PORT_CONNECTION 16
#define USB_HUB_C_PORT_RESET 20 #define USB_HUB_C_PORT_RESET 20
static int hub_port_status(const char *buf, int feature) static int hub_port_status(const char *buf, int feature)
{ {
return !!(buf[feature>>3] & (1<<(feature&0x7))); return !!(buf[feature>>3] & (1<<(feature&0x7)));
@ -73,7 +72,6 @@ static int dbgp_hub_enable(struct ehci_dbg_port *ehci_debug, unsigned char hub_a
if (ret < 0) if (ret < 0)
goto err; goto err;
/* Set PORT_RESET, poll for C_PORT_RESET. */ /* Set PORT_RESET, poll for C_PORT_RESET. */
ret = dbgp_control_msg(ehci_debug, hub_addr, ret = dbgp_control_msg(ehci_debug, hub_addr,
USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER,

1
src/drivers/usb/pci_xhci/pci_xhci.c
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@ -24,7 +24,6 @@ __weak enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe)
return CB_SUCCESS; return CB_SUCCESS;
} }
static void xhci_count_ports(void *context, const struct xhci_supported_protocol *data) static void xhci_count_ports(void *context, const struct xhci_supported_protocol *data)
{ {
struct port_counts *counts = context; struct port_counts *counts = context;

1
src/drivers/wifi/generic/generic.c
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@ -105,7 +105,6 @@ static void emit_sar_acpi_structures(void)
acpigen_pop_len(); acpigen_pop_len();
acpigen_pop_len(); acpigen_pop_len();
if (!CONFIG(GEO_SAR_ENABLE)) if (!CONFIG(GEO_SAR_ENABLE))
return; return;