diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index 308dc3c7a9..434bd2b23b 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -429,9 +429,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 				&params->SerialIoSpiCsPolarity[0], NULL, NULL);
 #endif
 
-	/* Set correct Sirq mode based on config */
-	params->PchSirqMode = config->SerialIrqConfigSirqMode;
-
 	/* Chipset Lockdown */
 	if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT) {
 		tconfig->PchLockDownGlobalSmi = 0;
diff --git a/src/soc/intel/cannonlake/graphics.c b/src/soc/intel/cannonlake/graphics.c
index e0901906fb..73c1f7aabf 100644
--- a/src/soc/intel/cannonlake/graphics.c
+++ b/src/soc/intel/cannonlake/graphics.c
@@ -93,8 +93,8 @@ uintptr_t graphics_soc_write_acpi_opregion(const struct device *device,
 }
 
 const struct i915_gpu_controller_info *
-intel_igd_get_controller_info(struct device *device)
+intel_igd_get_controller_info(const struct device *device)
 {
-	struct soc_intel_apollolake_config *chip = device->chip_info;
+	struct soc_intel_cannonlake_config *chip = device->chip_info;
 	return &chip->gfx;
 }