mb/google/guybrush: Pass in Cr50 IRQ to PSP

Different guybrush boards have different TPM IRQs. This change passes in
the correct GPIO to the TPM.

BUG=b:241824257
TEST=Boot guybrush and verify GPIO 3 was passed and that OEM Crypto test
passes

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I61954fa4493fd56e528b616ca65166a31917f557
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66615
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Raul E Rangel 2022-08-10 15:28:15 -06:00 committed by Raul Rangel
parent f8a187fcd5
commit d1a42b6fa9

View File

@ -4,9 +4,11 @@
#include <acpi/acpigen.h>
#include <amdblocks/acpimmio.h>
#include <amdblocks/amd_pci_util.h>
#include <amdblocks/psp.h>
#include <baseboard/variants.h>
#include <console/console.h>
#include <device/device.h>
#include <drivers/i2c/tpm/chip.h>
#include <gpio.h>
#include <soc/acpi.h>
#include <variant/ec.h>
@ -115,11 +117,22 @@ void __weak variant_devtree_update(void)
{
}
static void configure_psp_tpm_gpio(void)
{
const struct device *cr50_dev = DEV_PTR(cr50);
struct drivers_i2c_tpm_config *cfg = config_of(cr50_dev);
psp_set_tpm_irq_gpio(cfg->irq_gpio.pins[0]);
}
static void mainboard_init(void *chip_info)
{
mainboard_configure_gpios();
mainboard_ec_init();
variant_devtree_update();
/* Run this after variant_devtree_update so the IRQ is correct. */
configure_psp_tpm_gpio();
}
static void mainboard_write_blken(void)