Extend coreboot table entry for serial ports

Add information about memory mapped/io mapped base addresses.

and fix up libpayload to use the same structures

Signed-off-by: Stefan Reinauer <reinauer@google.com>

Change-Id: I5f7b5eda6063261b9acb7a46310172d4a5471dfb
Reviewed-on: http://review.coreboot.org/261
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

payloads/libpayload/include/coreboot_tables.h

@@ -60,9 +60,13 @@ struct cb_memory_range {
 	u32 type;
 };
 
-#define CB_MEM_RAM      1
-#define CB_MEM_RESERVED 2
-#define CB_MEM_TABLE    16
+#define CB_MEM_RAM          1
+#define CB_MEM_RESERVED     2
+#define CB_MEM_ACPI         3
+#define CB_MEM_NVS          4
+#define CB_MEM_UNUSABLE     5
+#define CB_MEM_VENDOR_RSVD  6
+#define CB_MEM_TABLE       16
 
 struct cb_memory {
 	u32 tag;
@@ -110,7 +114,11 @@ struct cb_string {
 struct cb_serial {
 	u32 tag;
 	u32 size;
-	u16 ioport;
+#define CB_SERIAL_TYPE_IO_MAPPED     1
+#define CB_SERIAL_TYPE_MEMORY_MAPPED 2
+	u32 type;
+	u32 baseaddr;
+	u32 baud;
 };
 
 #define CB_TAG_CONSOLE       0x00010