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mb/amd,google/*/port_descriptors: use dxio_link_hotplug_type enum values

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Use the proper dxio_link_hotplug_type enum values for the link_hotplug
field in the DXIO descriptors to replace the magic values in the code.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ieb1513737e6022a668287dc80a39d96cda2b18d5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76439
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2023-07-13 00:58:36 +02:00
parent e479b3e356
commit d1c33aeef4
6 changed files with 21 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/mainboard/amd/birman/port_descriptors_glinda.c
View File

@ -19,7 +19,7 @@ static const fsp_dxio_descriptor birman_dxio_descriptors[] = {
.link_speed_capability = GEN3, .link_speed_capability = GEN3,
.turn_off_unused_lanes = true, .turn_off_unused_lanes = true,
.link_aspm = 2, .link_aspm = 2,
.link_hotplug = 3, .link_hotplug = HOTPLUG_ENHANCED,
.clk_req = CLK_REQ3, .clk_req = CLK_REQ3,
}, },
{ {
@ -32,7 +32,7 @@ static const fsp_dxio_descriptor birman_dxio_descriptors[] = {
.link_speed_capability = GEN3, .link_speed_capability = GEN3,
.turn_off_unused_lanes = true, .turn_off_unused_lanes = true,
.link_aspm = 2, .link_aspm = 2,
.link_hotplug = 3, .link_hotplug = HOTPLUG_ENHANCED,
.clk_req = CLK_REQ1, .clk_req = CLK_REQ1,
}, },
{ {
@ -45,7 +45,7 @@ static const fsp_dxio_descriptor birman_dxio_descriptors[] = {
.link_speed_capability = GEN3, .link_speed_capability = GEN3,
.turn_off_unused_lanes = true, .turn_off_unused_lanes = true,
.link_aspm = 2, .link_aspm = 2,
.link_hotplug = 3, .link_hotplug = HOTPLUG_ENHANCED,
.gpio_group_id = GPIO_27, .gpio_group_id = GPIO_27,
.clk_req = CLK_REQ0, .clk_req = CLK_REQ0,
}, },

18
src/mainboard/amd/birman/port_descriptors_phoenix.c
View File

@ -17,7 +17,7 @@
.link_speed_capability = GEN3, \ .link_speed_capability = GEN3, \
.turn_off_unused_lanes = true, \ .turn_off_unused_lanes = true, \
.link_aspm = ASPM_L1, \ .link_aspm = ASPM_L1, \
.link_hotplug = 0, \ .link_hotplug = HOTPLUG_DISABLED, \
.clk_req = CLK_REQ0, \ .clk_req = CLK_REQ0, \
} }
@ -32,7 +32,7 @@
.link_speed_capability = GEN3, \ .link_speed_capability = GEN3, \
.turn_off_unused_lanes = true, \ .turn_off_unused_lanes = true, \
.link_aspm = ASPM_L1, \ .link_aspm = ASPM_L1, \
.link_hotplug = 0, \ .link_hotplug = HOTPLUG_DISABLED, \
.clk_req = CLK_REQ0, \ .clk_req = CLK_REQ0, \
} }
@ -46,7 +46,7 @@
.link_speed_capability = GEN3, \ .link_speed_capability = GEN3, \
.turn_off_unused_lanes = true, \ .turn_off_unused_lanes = true, \
.link_aspm = ASPM_L1, \ .link_aspm = ASPM_L1, \
.link_hotplug = 0, \ .link_hotplug = HOTPLUG_DISABLED, \
.clk_req = CLK_REQ1, \ .clk_req = CLK_REQ1, \
} }
@ -61,7 +61,7 @@
.link_speed_capability = GEN3, \ .link_speed_capability = GEN3, \
.turn_off_unused_lanes = true, \ .turn_off_unused_lanes = true, \
.link_aspm = ASPM_L1, \ .link_aspm = ASPM_L1, \
.link_hotplug = 0, \ .link_hotplug = HOTPLUG_DISABLED, \
.clk_req = CLK_REQ1, \ .clk_req = CLK_REQ1, \
} }
@ -75,7 +75,7 @@
.link_speed_capability = GEN3, \ .link_speed_capability = GEN3, \
.turn_off_unused_lanes = true, \ .turn_off_unused_lanes = true, \
.link_aspm = ASPM_L1, \ .link_aspm = ASPM_L1, \
.link_hotplug = 0, \ .link_hotplug = HOTPLUG_DISABLED, \
.clk_req = CLK_REQ6, \ .clk_req = CLK_REQ6, \
} }
@ -89,7 +89,7 @@
.link_speed_capability = GEN3, \ .link_speed_capability = GEN3, \
.turn_off_unused_lanes = true, \ .turn_off_unused_lanes = true, \
.link_aspm = ASPM_L1, \ .link_aspm = ASPM_L1, \
.link_hotplug = 0, \ .link_hotplug = HOTPLUG_DISABLED, \
.clk_req = CLK_REQ5, \ .clk_req = CLK_REQ5, \
} }
@ -103,7 +103,7 @@
.link_speed_capability = GEN3, \ .link_speed_capability = GEN3, \
.turn_off_unused_lanes = true, \ .turn_off_unused_lanes = true, \
.link_aspm = ASPM_L1, \ .link_aspm = ASPM_L1, \
.link_hotplug = 0, \ .link_hotplug = HOTPLUG_DISABLED, \
.clk_req = CLK_REQ4, \ .clk_req = CLK_REQ4, \
} }
@ -117,7 +117,7 @@
.link_speed_capability = GEN3, \ .link_speed_capability = GEN3, \
.turn_off_unused_lanes = true, \ .turn_off_unused_lanes = true, \
.link_aspm = ASPM_L1, \ .link_aspm = ASPM_L1, \
.link_hotplug = 0, \ .link_hotplug = HOTPLUG_DISABLED, \
.clk_req = CLK_REQ3, \ .clk_req = CLK_REQ3, \
} }
@ -131,7 +131,7 @@
.link_speed_capability = GEN3, \ .link_speed_capability = GEN3, \
.turn_off_unused_lanes = true, \ .turn_off_unused_lanes = true, \
.link_aspm = ASPM_L1, \ .link_aspm = ASPM_L1, \
.link_hotplug = 0, \ .link_hotplug = HOTPLUG_DISABLED, \
.clk_req = CLK_REQ2, \ .clk_req = CLK_REQ2, \
} }

6
src/mainboard/amd/chausie/port_descriptors.c
View File

@ -17,7 +17,7 @@ static const fsp_dxio_descriptor chausie_dxio_descriptors[] = {
.link_speed_capability = GEN3, .link_speed_capability = GEN3,
.turn_off_unused_lanes = true, .turn_off_unused_lanes = true,
.link_aspm = 2, .link_aspm = 2,
.link_hotplug = 3, .link_hotplug = HOTPLUG_ENHANCED,
.clk_req = CLK_REQ3, .clk_req = CLK_REQ3,
}, },
{ /* WIFI */ { /* WIFI */
@ -30,7 +30,7 @@ static const fsp_dxio_descriptor chausie_dxio_descriptors[] = {
.link_speed_capability = GEN3, .link_speed_capability = GEN3,
.turn_off_unused_lanes = true, .turn_off_unused_lanes = true,
.link_aspm = 2, .link_aspm = 2,
.link_hotplug = 3, .link_hotplug = HOTPLUG_ENHANCED,
.clk_req = CLK_REQ1, .clk_req = CLK_REQ1,
}, },
{ /* NVMe SSD */ { /* NVMe SSD */
@ -43,7 +43,7 @@ static const fsp_dxio_descriptor chausie_dxio_descriptors[] = {
.link_speed_capability = GEN3, .link_speed_capability = GEN3,
.turn_off_unused_lanes = true, .turn_off_unused_lanes = true,
.link_aspm = 2, .link_aspm = 2,
.link_hotplug = 3, .link_hotplug = HOTPLUG_ENHANCED,
.gpio_group_id = GPIO_27, .gpio_group_id = GPIO_27,
.clk_req = CLK_REQ0, .clk_req = CLK_REQ0,
}, },

8
src/mainboard/amd/mayan/port_descriptors.c
View File

@ -22,7 +22,7 @@ static const fsp_dxio_descriptor mayan_dxio_descriptors[] = {
.link_aspm = ASPM_L1, .link_aspm = ASPM_L1,
.link_aspm_L1_1 = true, .link_aspm_L1_1 = true,
.link_aspm_L1_2 = true, .link_aspm_L1_2 = true,
.link_hotplug = false, .link_hotplug = HOTPLUG_DISABLED,
.gpio_group_id = 4, .gpio_group_id = 4,
.clk_pm_support = true, .clk_pm_support = true,
.clk_req = CLK_REQ0, .clk_req = CLK_REQ0,
@ -42,7 +42,7 @@ static const fsp_dxio_descriptor mayan_dxio_descriptors[] = {
.link_aspm = ASPM_L1, .link_aspm = ASPM_L1,
.link_aspm_L1_1 = true, .link_aspm_L1_1 = true,
.link_aspm_L1_2 = true, .link_aspm_L1_2 = true,
.link_hotplug = false, .link_hotplug = HOTPLUG_DISABLED,
.gpio_group_id = 27, .gpio_group_id = 27,
.clk_pm_support = true, .clk_pm_support = true,
.clk_req = CLK_REQ4, .clk_req = CLK_REQ4,
@ -62,7 +62,7 @@ static const fsp_dxio_descriptor mayan_dxio_descriptors[] = {
.link_aspm = ASPM_L1, .link_aspm = ASPM_L1,
.link_aspm_L1_1 = true, .link_aspm_L1_1 = true,
.link_aspm_L1_2 = true, .link_aspm_L1_2 = true,
.link_hotplug = false, .link_hotplug = HOTPLUG_DISABLED,
.clk_pm_support = true, .clk_pm_support = true,
.clk_req = CLK_REQ2, .clk_req = CLK_REQ2,
.eq_preset = 3, .eq_preset = 3,
@ -81,7 +81,7 @@ static const fsp_dxio_descriptor mayan_dxio_descriptors[] = {
.link_aspm = ASPM_L1, .link_aspm = ASPM_L1,
.link_aspm_L1_1 = true, .link_aspm_L1_1 = true,
.link_aspm_L1_2 = true, .link_aspm_L1_2 = true,
.link_hotplug = false, .link_hotplug = HOTPLUG_DISABLED,
.clk_pm_support = true, .clk_pm_support = true,
.clk_req = CLK_REQ1, .clk_req = CLK_REQ1,
.eq_preset = 3, .eq_preset = 3,

2
src/mainboard/google/myst/port_descriptors.c
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@ -39,7 +39,7 @@ static fsp_dxio_descriptor myst_dxio_descriptors[] = {
.function_number = PCI_FUNC(SD_DEVFN), .function_number = PCI_FUNC(SD_DEVFN),
.link_speed_capability = GEN1, .link_speed_capability = GEN1,
.turn_off_unused_lanes = true, .turn_off_unused_lanes = true,
.link_hotplug = 3, .link_hotplug = HOTPLUG_ENHANCED,
.clk_req = CLK_REQ1, .clk_req = CLK_REQ1,
}, },
[DXIO_STORAGE] = { 0 }, [DXIO_STORAGE] = { 0 },

2
src/mainboard/google/skyrim/port_descriptors.c
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@ -32,7 +32,7 @@ static const fsp_dxio_descriptor skyrim_mdn_dxio_descriptors[] = {
.function_number = PCI_FUNC(SD_DEVFN), .function_number = PCI_FUNC(SD_DEVFN),
.link_speed_capability = GEN3, .link_speed_capability = GEN3,
.turn_off_unused_lanes = true, .turn_off_unused_lanes = true,
.link_hotplug = 3, .link_hotplug = HOTPLUG_ENHANCED,
.link_aspm = ASPM_L1, .link_aspm = ASPM_L1,
.link_aspm_L1_1 = true, .link_aspm_L1_1 = true,
.gpio_group_id = GPIO_27, .gpio_group_id = GPIO_27,