AGESA cimx: Move cb_types.h to vendorcode

This file mostly mimics Porting.h and should be removed.
For now, move it and use it consistently with incorrect form
as #include "cbtypes.h".

Change-Id: Ifaee2694f9f33a4da6e780b03d41bdfab9e2813e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21663
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2017-09-24 11:36:30 +03:00
parent d42b799a9e
commit d229d4a28e
12 changed files with 7 additions and 15 deletions

View File

@@ -28,11 +28,9 @@
#*****************************************************************************
CPPFLAGS_x86_32 += -I$(src)/northbridge/amd/cimx/rd890
CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common
CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/rd890
CPPFLAGS_x86_64 += -I$(src)/northbridge/amd/cimx/rd890
CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common
CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/rd890
romstage-y += amdAcpiIvrs.c

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@@ -28,11 +28,9 @@
#*****************************************************************************
CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb700
CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common
CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb700
CPPFLAGS_x86_64 += -I$(src)/southbridge/amd/cimx/sb700
CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common
CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/sb700
romstage-y += ACPILIB.c

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@@ -46,7 +46,7 @@
#ifndef __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__
#define __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__
#include <cpu/amd/common/cbtypes.h>
#include "cbtypes.h"
//AMDSBLIB Routines

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@@ -14,11 +14,9 @@
#
CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb800
CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common
CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb800
CPPFLAGS_x86_64 += -I$(src)/southbridge/amd/cimx/sb800
CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common
CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/sb800
romstage-y += ACPILIB.c

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@@ -14,11 +14,9 @@
#
CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb900
CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common
CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb900
CPPFLAGS_x86_64 += -I$(src)/southbridge/amd/cimx/sb900
CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common
CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/sb900
romstage-y += AcpiLib.c

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@@ -40,7 +40,7 @@
;
;*********************************************************************************/
#include <cpu/amd/common/cbtypes.h>
#include "cbtypes.h"
// Southbridge SBMAIN Routines
/**

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@@ -0,0 +1,66 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _CBTYPES_H_
#define _CBTYPES_H_
/* Map coreboot stdint types to AGESA types. */
#include <stdint.h>
typedef int64_t __int64;
typedef void VOID;
typedef uintptr_t UINTN;
typedef char CHAR8;
typedef uint8_t UINT8;
typedef uint16_t UINT16;
typedef uint32_t UINT32;
typedef int32_t INT32;
typedef uint64_t UINT64;
typedef uint8_t BOOLEAN;
#define DMSG_SB_TRACE 0x02
#define TRACE(Arguments)
#ifndef TRUE
#define TRUE 1
#endif
#ifndef FALSE
#define FALSE 0
#endif
#ifndef VOLATILE
#define VOLATILE volatile
#endif
#ifndef CONST
#define CONST const
#endif
#ifndef IN
#define IN
#endif
#ifndef OUT
#define OUT
#endif
#ifndef STATIC
#define STATIC static
#endif
#ifndef VOLATILE
#define VOLATILE volatile
#endif
#endif