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Enable UART, unlock GPIO, set clksrcusage for GPU

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This commit is contained in:
Jeremy Soller
2019-05-13 13:04:52 -06:00
parent 09f85ecf66
commit d249ac929f
2 changed files with 8 additions and 4 deletions
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8
src/mainboard/system76/cfl-h/Kconfig
View File

@@ -11,6 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES
select HAVE_SMI_HANDLER select HAVE_SMI_HANDLER
select INTEL_GMA_HAVE_VBT select INTEL_GMA_HAVE_VBT
select INTEL_LPSS_UART_FOR_CONSOLE
# select MAINBOARD_HAS_SPI_TPM_CR50 # select MAINBOARD_HAS_SPI_TPM_CR50
# select MAINBOARD_HAS_TPM2 # select MAINBOARD_HAS_TPM2
select NO_UART_ON_SUPERIO select NO_UART_ON_SUPERIO
@@ -61,10 +62,9 @@ config ONBOARD_VGA_IS_PRIMARY
bool bool
default y default y
# This causes UEFI to hang config UART_FOR_CONSOLE
#config UART_FOR_CONSOLE int
# int default 2
# default 2
config MAX_CPUS config MAX_CPUS
int int

4
src/mainboard/system76/cfl-h/devicetree.cb
View File

@@ -126,6 +126,7 @@ chip soc/intel/cannonlake
register "PcieClkSrcClkReq[11]" = "11" register "PcieClkSrcClkReq[11]" = "11"
# PCI Express on CPU x8, Clock 8 (GPU) # PCI Express on CPU x8, Clock 8 (GPU)
register "PcieClkSrcUsage[8]" = "0x40"
register "PcieClkSrcClkReq[8]" = "8" register "PcieClkSrcClkReq[8]" = "8"
# Misc # Misc
@@ -144,6 +145,9 @@ chip soc/intel/cannonlake
# Thermal # Thermal
register "tcc_offset" = "2" register "tcc_offset" = "2"
# Unlock GPIO pads
register "PchUnlockGpioPads" = "1"
# Serial IRQ Continuous # Serial IRQ Continuous
register "SerialIrqConfigSirqMode" = "1" register "SerialIrqConfigSirqMode" = "1"