cpu/x86/Kconfig: Mark 64bit support as stable
With SMM holding page tables itself, we can consider SMM support stable and safe enough for general use. Also update the respective documentation. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: Ifcf0a1a5097a2d7c064bb709ec0b09ebee13a47d Reviewed-on: https://review.coreboot.org/c/coreboot/+/80338 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
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Martin L Roth
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@@ -65,23 +65,21 @@ config ARCH_ALL_STAGES_X86_64
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select ARCH_ROMSTAGE_X86_64
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select ARCH_RAMSTAGE_X86_64
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config HAVE_EXP_X86_64_SUPPORT
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config HAVE_X86_64_SUPPORT
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bool
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help
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Enable experimental support to build and run coreboot in 64-bit mode.
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When selecting this option for a new platform, it is highly advisable
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to provide a config file for Jenkins to build-test the 64-bit option.
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config USE_EXP_X86_64_SUPPORT
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bool "[EXPERIMENTAL] Run coreboot in long (64-bit) mode"
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depends on HAVE_EXP_X86_64_SUPPORT
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config USE_X86_64_SUPPORT
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bool "Run coreboot in long (64-bit) mode"
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depends on HAVE_X86_64_SUPPORT
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select ARCH_ALL_STAGES_X86_64
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help
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When set, most of coreboot runs in long (64-bit) mode instead of the
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usual protected flat (32-bit) mode. 64-bit CPUs and OSes can be used
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irrespective of whether coreboot runs in 32-bit or 64-bit mode. This
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is an experimental option: do not enable unless one wants to test it
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and has the means to recover a system when coreboot fails to boot.
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irrespective of whether coreboot runs in 32-bit or 64-bit mode.
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config PAGE_TABLES_IN_CBFS
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bool
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@@ -2,7 +2,7 @@
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config CPU_INTEL_MODEL_2065X
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bool
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select HAVE_EXP_X86_64_SUPPORT
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select HAVE_X86_64_SUPPORT
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select ARCH_X86
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select SSE2
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select UDELAY_TSC
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@@ -3,7 +3,7 @@
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config CPU_INTEL_MODEL_206AX
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bool
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select ARCH_X86
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select HAVE_EXP_X86_64_SUPPORT
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select HAVE_X86_64_SUPPORT
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select SSE2
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select UDELAY_TSC
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select TSC_MONOTONIC_TIMER
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@@ -3,7 +3,7 @@
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config CPU_QEMU_X86
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bool
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select ARCH_X86
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select HAVE_EXP_X86_64_SUPPORT
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select HAVE_X86_64_SUPPORT
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select UDELAY_TSC
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select TSC_MONOTONIC_TIMER
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select UNKNOWN_TSC_RATE
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@@ -7,7 +7,7 @@ config NORTHBRIDGE_INTEL_GM45
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select INTEL_EDID
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select INTEL_GMA_ACPI
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select INTEL_GMA_SSC_ALTERNATE_REF
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select HAVE_EXP_X86_64_SUPPORT
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select HAVE_X86_64_SUPPORT
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select USE_DDR3
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select USE_DDR2
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@@ -7,7 +7,7 @@ config NORTHBRIDGE_INTEL_X4X
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select INTEL_GMA_ACPI
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select CACHE_MRC_SETTINGS
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select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
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select HAVE_EXP_X86_64_SUPPORT
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select HAVE_X86_64_SUPPORT
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select USE_DDR3
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select USE_DDR2
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@@ -11,7 +11,7 @@ config SOC_SPECIFIC_OPTIONS
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select ARCH_X86
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select DEFAULT_X2APIC
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select HAVE_ACPI_TABLES
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select HAVE_EXP_X86_64_SUPPORT
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select HAVE_X86_64_SUPPORT
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select HAVE_SMI_HANDLER
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select RESET_VECTOR_IN_RAM
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select SOC_AMD_COMMON
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@@ -50,7 +50,7 @@ config SOC_SPECIFIC_OPTIONS
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select SOC_AMD_OPENSIL_GENOA_POC
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select X86_CUSTOM_BOOTMEDIA
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config USE_EXP_X86_64_SUPPORT
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config USE_X86_64_SUPPORT
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default y
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config CHIPSET_DEVICETREE
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@@ -77,7 +77,7 @@ config SOC_AMD_PICASSO
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select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE
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select X86_AMD_FIXED_MTRRS
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select X86_INIT_NEED_1_SIPI
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select HAVE_EXP_X86_64_SUPPORT
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select HAVE_X86_64_SUPPORT
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help
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AMD Picasso support
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@@ -79,7 +79,7 @@ config SOC_INTEL_CANNONLAKE_BASE
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config SOC_INTEL_COFFEELAKE
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bool
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select SOC_INTEL_CANNONLAKE_BASE
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select HAVE_EXP_X86_64_SUPPORT
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select HAVE_X86_64_SUPPORT
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select HECI_DISABLE_USING_SMM
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select INTEL_CAR_NEM
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@@ -16,7 +16,7 @@ config SOC_INTEL_SAPPHIRERAPIDS_SP
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select FSP_SPEC_VIOLATION_XEON_SP_HEAP_WORKAROUND
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select UDK_202005_BINDING
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select SOC_INTEL_HAS_CXL
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select HAVE_EXP_X86_64_SUPPORT
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select HAVE_X86_64_SUPPORT
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help
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Intel Sapphire Rapids-SP support
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