sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Documentation: Use correct KiB/MiB units instead of KB/MB

Browse Source 
Fix a common mistake of using KB/MB where KiB/MiB is what actually is meant.

1 MB = (10^3)^2 = 1000000
1 MiB = (2^10)^2 = 1048576

Change-Id: I78327652b6c6526318071a9d4bafd7ec279ea614
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39685
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Evgeny Zinoviev
2020-03-20 02:57:00 +03:00
committed by Patrick Georgi
parent 7ac6ae95ca
commit d2b3961fdc
8 changed files with 21 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
Documentation/mainboard/lenovo/montevina_series.md
View File

@@ -53,7 +53,7 @@ the `new_layout.txt` file:
```eval_rst
+---------------------------+---------------------------+---------------------------+
| 4 MB chip | 8 MB chip | 16 MB chip |
| 4 MiB chip | 8 MiB chip | 16 MiB chip |
+===========================+===========================+===========================+
| .. code-block:: none | .. code-block:: none | .. code-block:: none |
| | | |
@@ -97,12 +97,12 @@ $ cd util/bincfg
$ make
```
If your flash is not 8 MB, you need to change values of `flcomp_density1` and
If your flash is not 8 MiB, you need to change values of `flcomp_density1` and
`flreg1_limit` in the `ifd-x200.set` file according to following table:
```eval_rst
+-----------------+-------+-------+--------+
| | 4 MB | 8 MB | 16 MB |
| | 4 MiB | 8 MiB | 16 MiB |
+=================+=======+=======+========+
| flcomp_density1 | 0x3 | 0x4 | 0x5 |
+-----------------+-------+-------+--------+
@@ -123,7 +123,7 @@ to flash descriptor and gbe dump.
```
Mainboard --->
ROM chip size (8192 KB (8 MB)) # According to your chip
(0x7fd000) Size of CBFS filesystem in ROM # or 0x3fd000 for 4 MB chip / 0x1ffd000 for 16 MB chip
(0x7fd000) Size of CBFS filesystem in ROM # or 0x3fd000 for 4 MiB chip / 0x1ffd000 for 16 MiB chip
Chipset --->
[*] Add Intel descriptor.bin file
@@ -142,7 +142,7 @@ The flash layouts of the OEM firmware are as follows:
```eval_rst
+---------------------------------+---------------------------------+
| 4 MB chip | 8 MB chip |
| 4 MiB chip | 8 MiB chip |
+=================================+=================================+
| .. code-block:: none | .. code-block:: none |
| | |
@@ -159,6 +159,6 @@ The flash layouts of the OEM firmware are as follows:
On each boot of vendor BIOS `ec` area in flash is checked for having firmware
there, and if there is one, it proceedes to update firmware on H8S/2116 (when
both external power and main battery are attached). Once update is performed,
first 64 KB of `ec` area is erased. Visit
first 64 KiB of `ec` area is erased. Visit
[thinkpad-ec repository](https://github.com/hamishcoleman/thinkpad-ec) to learn
more about how to extract EC firmware from vendor updates.

8
Documentation/mainboard/lenovo/t440p.md
View File

@@ -8,15 +8,15 @@ Please see [mrc.bin](../../northbridge/intel/haswell/mrc.bin).
## Flashing instructions
T440p has two flash chips, an 8MB W25Q64FV and a 4MB W25Q32FV. To flash
T440p has two flash chips, an 8 MiB W25Q64FV and a 4 MiB W25Q32FV. To flash
coreboot, you just need to remove the big door according to the T440
[Hardware Maintenance Manual] and flash the 4MB chip.
[Hardware Maintenance Manual] and flash the 4 MiB chip.
![T440p flash chip](t440p_flash_chip.jpg)
To access the 8MB chip, you need to remove the base cover.
To access the 8 MiB chip, you need to remove the base cover.
![T440p 8MB flash chip](t440p_all_flash_chips.jpg)
![T440p 8 MiB flash chip](t440p_all_flash_chips.jpg)
The flash layout of the OEM firmware is as follows: