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device/pci: Rewrite PCI MMCONF with symbol reference

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The effect of pointer aliasing on writes is that any data on CPU
registers that has been resolved from (non-const and non-volatile)
memory objects has to be discarded and resolved. In other words, the
compiler assumes that a pointer that does not have an absolute value
at build-time, and is of type 'void *' or 'char *', may write over
any memory object.

Using a unique datatype for MMIO writes makes the pointer to _not_
qualify for pointer aliasing with any other objects in memory. This
avoid constantly resolving the PCI MMCONF address, which is a derived
value from a 'struct device *'.

Change-Id: Id112aa5e729ffd8015bb806786bdee38783b7ea9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31752
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki
2019-03-05 07:56:38 +02:00
parent bf0970e762
commit d2cdfff63b
6 changed files with 130 additions and 19 deletions
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72
src/arch/x86/include/arch/pci_mmio_cfg_romcc.h Normal file
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@@ -0,0 +1,72 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _PCI_MMIO_CFG_ROMCC_H
#define _PCI_MMIO_CFG_ROMCC_H
#include <stdint.h>
#include <device/mmio.h>
#include <device/pci_type.h>
static __always_inline
uint8_t pci_mmio_read_config8(pci_devfn_t dev, uint16_t reg)
{
void *addr;
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | reg);
return read8(addr);
}
static __always_inline
uint16_t pci_mmio_read_config16(pci_devfn_t dev, uint16_t reg)
{
void *addr;
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (reg & ~1));
return read16(addr);
}
static __always_inline
uint32_t pci_mmio_read_config32(pci_devfn_t dev, uint16_t reg)
{
void *addr;
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (reg & ~3));
return read32(addr);
}
static __always_inline
void pci_mmio_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
{
void *addr;
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | reg);
write8(addr, value);
}
static __always_inline
void pci_mmio_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
{
void *addr;
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (reg & ~1));
write16(addr, value);
}
static __always_inline
void pci_mmio_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
{
void *addr;
addr = (void *)(uintptr_t)(CONFIG_MMCONF_BASE_ADDRESS | dev | (reg & ~3));
write32(addr, value);
}
#endif /* _PCI_MMIO_CFG_ROMCC_H */

6
src/arch/x86/include/arch/pci_ops.h
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@@ -15,6 +15,12 @@
#define ARCH_I386_PCI_OPS_H
#include <arch/pci_io_cfg.h>
#if defined(__ROMCC__)
/* Must come before <device/pci_mmio_cfg.h> */
#include <arch/pci_mmio_cfg_romcc.h>
#endif
#include <device/pci_mmio_cfg.h>
#endif /* ARCH_I386_PCI_OPS_H */