intel/common/block: move RAPL disabling to common code

This patch brings the feature of disabling RAPL to common code. It
replaces the current solution for APL and EHL.
For special case if RAPL disabling is only working via changes in MCHBAR
a new config switch was introduced.

Test: Boot mc_apl4/5 with this patch and ensure that the
relevant bits in MSR 0x610 are the same as before the
patch.

Change-Id: I2098ddcd2f19e3ebd87ef00c544e1427674f5e84
Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64596
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>

src/soc/intel/apollolake/chip.c

@@ -321,14 +321,10 @@ static void soc_init(void *data)
 	 */
 	p2sb_unhide();
 
-	if (CONFIG(SOC_INTEL_DISABLE_POWER_LIMITS)) {
+	config = config_of_soc();
-		printk(BIOS_INFO, "Skip setting RAPL per configuration\n");
+	/* Set RAPL MSR for Package power limits */
-	} else {
+	soc_config = &config->power_limits_config;
-		config = config_of_soc();
+	set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config);
-		/* Set RAPL MSR for Package power limits */
-		soc_config = &config->power_limits_config;
-		set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config);
-	}
 
 	/*
 	* FSP-S routes SCI to IRQ 9. With the help of this function you can

src/soc/intel/common/block/power_limit/Kconfig

@@ -3,3 +3,9 @@ config SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
 	default n
 	help
 	  This option allows to configure processor power limit values.
+
+config SOC_INTEL_RAPL_DISABLE_VIA_MCHBAR
+	bool
+	default n
+	help
+	  Select if disabling Running Average Power Limit (RAPL) has to be done via MCHBAR.

src/soc/intel/common/block/power_limit/power_limit.c

@@ -77,6 +77,23 @@ void set_power_limits(u8 power_limit_1_time,
 	unsigned int power_unit;
 	unsigned int tdp, min_power, max_power, max_time, tdp_pl2, tdp_pl1;
 	u8 power_limit_1_val;
+	uint32_t value;
+
+	if (CONFIG(SOC_INTEL_DISABLE_POWER_LIMITS)) {
+		printk(BIOS_INFO, "Disabling RAPL\n");
+		if (CONFIG(SOC_INTEL_RAPL_DISABLE_VIA_MCHBAR)) {
+			value = MCHBAR32(MCH_PKG_POWER_LIMIT_LO);
+			MCHBAR32(MCH_PKG_POWER_LIMIT_LO) = value & ~(PKG_POWER_LIMIT_EN);
+			value = MCHBAR32(MCH_PKG_POWER_LIMIT_HI);
+			MCHBAR32(MCH_PKG_POWER_LIMIT_HI) = value & ~(PKG_POWER_LIMIT_EN);
+		} else {
+			msr = rdmsr(MSR_PKG_POWER_LIMIT);
+			msr.lo &= ~PKG_POWER_LIMIT_EN;
+			msr.hi &= ~PKG_POWER_LIMIT_EN;
+			wrmsr(MSR_PKG_POWER_LIMIT, msr);
+		}
+		return;
+	}
 
 	if (power_limit_1_time >= ARRAY_SIZE(power_limit_time_sec_to_msr))
 		power_limit_1_time =

src/soc/intel/elkhartlake/systemagent.c

@@ -48,7 +48,6 @@ void soc_systemagent_init(struct device *dev)
 {
 	struct soc_power_limits_config *soc_config;
 	config_t *config;
-	uint32_t value;
 
 	/* Enable Power Aware Interrupt Routing */
 	enable_power_aware_intr();
@@ -57,16 +56,9 @@ void soc_systemagent_init(struct device *dev)
 	enable_bios_reset_cpl();
 
 	mdelay(1);
-	if (CONFIG(SOC_INTEL_DISABLE_POWER_LIMITS)) {
+
-		printk(BIOS_INFO, "Skip setting RAPL per configuration\n");
+	config = config_of_soc();
-		/* clear bits 47, 15 in PACKAGE_RAPL_LIMIT_0_0_0_MCHBAR_PCU */
+	soc_config = &config->power_limits_config;
-		value = MCHBAR32(MCH_PKG_POWER_LIMIT_LO);
+	set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config);
-		MCHBAR32(MCH_PKG_POWER_LIMIT_LO) = value & ~(PKG_PWR_LIM_1_EN);
+
-		value = MCHBAR32(MCH_PKG_POWER_LIMIT_HI);
-		MCHBAR32(MCH_PKG_POWER_LIMIT_HI) = value & ~(PKG_PWR_LIM_2_EN);
-	} else {
-		config = config_of_soc();
-		soc_config = &config->power_limits_config;
-		set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config);
-	}
 }