diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 580f71f90b..d924daf4e7 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -27,7 +27,9 @@
 #define POWER_LIMITS_U_4_CORE	1
 #define POWER_LIMITS_Y_2_CORE	2
 #define POWER_LIMITS_Y_4_CORE	3
-#define POWER_LIMITS_MAX	4
+#define POWER_LIMITS_H_6_CORE	4
+#define POWER_LIMITS_H_8_CORE	5
+#define POWER_LIMITS_MAX	6
 
 /*
  * Enable External V1P05 Rail in: BIT0:S0i1/S0i2,
diff --git a/src/soc/intel/tigerlake/systemagent.c b/src/soc/intel/tigerlake/systemagent.c
index 29487a8c81..bc807d8227 100644
--- a/src/soc/intel/tigerlake/systemagent.c
+++ b/src/soc/intel/tigerlake/systemagent.c
@@ -90,6 +90,12 @@ void soc_systemagent_init(struct device *dev)
 	case PCI_DEVICE_ID_INTEL_TGL_ID_Y_4_2:
 		soc_config = &config->power_limits_config[POWER_LIMITS_Y_4_CORE];
 		break;
+	case PCI_DEVICE_ID_INTEL_TGL_ID_H_6_1:
+		soc_config = &config->power_limits_config[POWER_LIMITS_H_6_CORE];
+		break;
+	case PCI_DEVICE_ID_INTEL_TGL_ID_H_8_1:
+		soc_config = &config->power_limits_config[POWER_LIMITS_H_8_CORE];
+		break;
 	default:
 		printk(BIOS_ERR, "TGL: unknown SA ID: 0x%4x, skipping power limits "
 		       "configuration\n", sa_pci_id);