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vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2374_01

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The headers added are generated as per FSP v2374_01.
Previous FSP version was v2347_00.
Changes Include:
- Offset change in FspmUpd.h and FspsUpd.h

BUG=b:201239436
BRANCH=None
TEST=Build and boot brya

Cq-Depend: chrome-internal:4150766
Change-Id: I097e854bcb4033bdaf2498fb97b255e87d3dd70f
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57920
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ronak Kanabar
2021-09-24 15:40:28 +05:30
committed by Nick Vaccaro
parent 3da6528c52
commit d326e44959
2 changed files with 8 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h
View File

@ -3162,7 +3162,7 @@ typedef struct {
/** Offset 0x0AA8 - Reserved
**/
UINT8 Reserved46[64];
UINT8 Reserved46[104];
} FSP_M_CONFIG;
/** Fsp M UPD Configuration
@ -3181,11 +3181,11 @@ typedef struct {
**/
FSP_M_CONFIG FspmConfig;
/** Offset 0x0AE8
/** Offset 0x0B10
**/
UINT8 UnusedUpdSpace29[6];
UINT8 UnusedUpdSpace31[6];
/** Offset 0x0AEE
/** Offset 0x0B16
**/
UINT16 UpdTerminator;
} FSPM_UPD;

8
src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
View File

@ -3869,7 +3869,7 @@ typedef struct {
/** Offset 0x0FD5 - Reserved
**/
UINT8 Reserved56[11];
UINT8 Reserved56[19];
} FSP_S_CONFIG;
/** Fsp S UPD Configuration
@ -3888,11 +3888,11 @@ typedef struct {
**/
FSP_S_CONFIG FspsConfig;
/** Offset 0x0FE0
/** Offset 0x0FE8
**/
UINT8 UnusedUpdSpace40[6];
UINT8 UnusedUpdSpace42[6];
/** Offset 0x0FE6
/** Offset 0x0FEE
**/
UINT16 UpdTerminator;
} FSPS_UPD;