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soc/intel/skylake: Add support in SKL for PMC common code

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Change-Id: I3742f9c22d990edd918713155ae0bb1853663b6f
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/20499
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Shaunak Saha
2017-07-08 01:08:40 -07:00
committed by Aaron Durbin
parent f073872e22
commit d347680995
13 changed files with 130 additions and 545 deletions
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10
src/soc/intel/skylake/reset.c
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@ -15,6 +15,7 @@
#include <console/console.h>
#include <fsp/util.h>
#include <intelblocks/pmclib.h>
#include <reset.h>
#include <soc/me.h>
#include <soc/pm.h>
@ -22,19 +23,12 @@
static void do_force_global_reset(void)
{
u32 reg32;
/*PMC Controller Device 0x1F, Func 02*/
uint8_t *pmc_regs;
/*
* BIOS should ensure it does a global reset
* to reset both host and Intel ME by setting
* PCH PMC [B0:D31:F2 register offset 0x1048 bit 20]
*/
pmc_regs = pmc_mmio_regs();
reg32 = read32(pmc_regs + ETR3);
reg32 |= ETR3_CF9GR;
write32(pmc_regs + ETR3, reg32);
pmc_global_reset_enable(true);
/* Now BIOS can write 0x06 or 0x0E to 0xCF9 port
* to global reset platform */