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Implement GCC code coverage analysis

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In order to provide some insight on what code is executed during
coreboot's run time and how well our test scenarios work, this
adds code coverage support to coreboot's ram stage. This should
be easily adaptable for payloads, and maybe even romstage.

See http://gcc.gnu.org/onlinedocs/gcc/Gcov.html for
more information.

To instrument coreboot, select CONFIG_COVERAGE ("Code coverage
support") in Kconfig, and recompile coreboot. coreboot will then
store its code coverage information into CBMEM, if possible.
Then, run "cbmem -CV" as root on the target system running the
instrumented coreboot binary. This will create a whole bunch of
.gcda files that contain coverage information. Tar them up, copy
them to your build system machine, and untar them. Then you can
use your favorite coverage utility (gcov, lcov, ...) to visualize
code coverage.

For a sneak peak of what will expect you, please take a look
at http://www.coreboot.org/~stepan/coreboot-coverage/

Change-Id: Ib287d8309878a1f5c4be770c38b1bc0bb3aa6ec7
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2052
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Martin Roth <martin@se-eng.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Stefan Reinauer
2012-12-18 16:23:28 -08:00
committed by Ronald G. Minnich
parent 6e21f43008
commit d37ab454d4
20 changed files with 2888 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/arch/armv7/Makefile.inc
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@@ -121,7 +121,7 @@ $(objgenerated)/coreboot_ram.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME)
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
$(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --wrap __do_div64 --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group
else
$(CC) -nostdlib -r -o $@ -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
endif
################################################################################

8
src/arch/armv7/coreboot_ram.ld
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@@ -38,6 +38,14 @@ SECTIONS
_etext = .;
}
.ctors : {
. = ALIGN(0x100);
__CTOR_LIST__ = .;
*(.ctors);
LONG(0);
__CTOR_END__ = .;
}
.rodata : {
_rodata = .;
. = ALIGN(4);

2
src/arch/x86/Makefile.inc
View File

@@ -166,7 +166,7 @@ $(objgenerated)/coreboot_ram.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME)
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
$(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group
else
$(CC) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
endif
################################################################################

4
src/arch/x86/boot/acpi.c
View File

@@ -36,6 +36,7 @@
#if CONFIG_COLLECT_TIMESTAMPS
#include <timestamp.h>
#endif
#include <coverage.h>
/* FIXME: Kconfig doesn't support overridable defaults :-( */
#ifndef CONFIG_HPET_MIN_TICKS
@@ -642,6 +643,9 @@ void suspend_resume(void)
/* Call mainboard resume handler first, if defined. */
if (mainboard_suspend_resume)
mainboard_suspend_resume();
#if CONFIG_COVERAGE
coverage_exit();
#endif
post_code(POST_OS_RESUME);
acpi_jump_to_wakeup(wake_vec);
}

8
src/arch/x86/coreboot_ram.ld
View File

@@ -39,6 +39,14 @@ SECTIONS
_etext = .;
}
.ctors : {
. = ALIGN(0x100);
__CTOR_LIST__ = .;
*(.ctors);
LONG(0);
__CTOR_END__ = .;
}
.rodata : {
_rodata = .;
. = ALIGN(4);