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src/superio: Remove unused superio chips

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These SIOs are not being used or tested by abuild, so remove them from the
tree. The only 3 currently unused SIOs that don't get removed here have board
ports in review.

src/superio/fintek/f71805f
src/superio/fintek/f71872
src/superio/intel/i8900
src/superio/ite/it8671f
src/superio/ite/it8716f
src/superio/nsc/pc87309
src/superio/nsc/pc87360
src/superio/nsc/pc87366
src/superio/nsc/pc97317
src/superio/smsc/dme1737
src/superio/smsc/lpc47b272
src/superio/smsc/lpc47b397
src/superio/smsc/sch4037
src/superio/smsc/sio1036
src/superio/via/vt1211
src/superio/winbond/w83697hf
src/superio/winbond/wpcd376i

Signed-off-by: Martin Roth <martin@coreboot.org>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I61d486d2c1e2b85eb292eaa78316c36e1735ebf4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35428
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Martin Roth
2019-09-15 17:36:09 -07:00
committed by Felix Held
parent 1eb0e195d6
commit d3a1a4171e
79 changed files with 0 additions and 3273 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
src/superio/ite/it8671f/Kconfig
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@@ -1,19 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2009 Ronald G. Minnich
## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
config SUPERIO_ITE_IT8671F
bool
select SUPERIO_ITE_COMMON_PRE_RAM

19
src/superio/ite/it8671f/Makefile.inc
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@@ -1,19 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
bootblock-$(CONFIG_SUPERIO_ITE_IT8671F) += early_serial.c
romstage-$(CONFIG_SUPERIO_ITE_IT8671F) += early_serial.c
ramstage-$(CONFIG_SUPERIO_ITE_IT8671F) += superio.c

104
src/superio/ite/it8671f/early_serial.c
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@@ -1,104 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include <device/pnp_type.h>
#include <device/pnp.h>
#include <stdint.h>
#include "it8671f.h"
/* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */
#define SIO_BASE 0x3f0
#define SIO_INDEX SIO_BASE
#define SIO_DATA (SIO_BASE + 1)
/* Global configuration registers. */
#define IT8671F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
#define IT8671F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
#define IT8671F_CONFIG_REG_LDE 0x23 /* PnP Logical Device Enable. */
#define IT8671F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend. */
#define IT8671F_CONFIGURATION_PORT 0x0279 /* Write-only. */
/*
* Special values used for entering MB PnP mode. The first four bytes of
* each line determine the address port, the last four are data.
*/
static const u8 init_values[] = {
0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe,
0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61,
0xb0, 0x58, 0x2c, 0x16, /**/ 0x8b, 0x45, 0xa2, 0xd1,
0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39,
};
static void it8671f_sio_write(u8 ldn, u8 index, u8 value)
{
outb(IT8671F_CONFIG_REG_LDN, SIO_BASE);
outb(ldn, SIO_DATA);
outb(index, SIO_BASE);
outb(value, SIO_DATA);
}
/* Enter the configuration state (MB PnP mode). */
static void it8671f_enter_conf(void)
{
int i;
/* Perform MB PnP setup to put the SIO chip at 0x3f0. */
/* Base address 0x3f0: 0x86 0x80 0x55 0x55. */
/* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */
/* Base address 0x370: 0x86 0x80 0xaa 0x55. */
outb(0x86, IT8671F_CONFIGURATION_PORT);
outb(0x80, IT8671F_CONFIGURATION_PORT);
outb(0x55, IT8671F_CONFIGURATION_PORT);
outb(0x55, IT8671F_CONFIGURATION_PORT);
/* Sequentially write the 32 special values. */
for (i = 0; i < 32; i++)
outb(init_values[i], SIO_BASE);
}
/* Exit the configuration state (MB PnP mode). */
static void it8671f_exit_conf(void)
{
it8671f_sio_write(0x00, IT8671F_CONFIG_REG_CC, 0x02);
}
/* Select 48MHz CLKIN (24MHz is the default). */
void it8671f_48mhz_clkin(void)
{
it8671f_enter_conf();
it8671f_sio_write(0x00, IT8671F_CONFIG_REG_SWSUSP, (1 << 6));
it8671f_exit_conf();
}
/* Enable the serial port(s). */
void it8671f_enable_serial(pnp_devfn_t dev, u16 iobase)
{
it8671f_enter_conf();
/*
* Allow all devices to be enabled. Bits: FDC (0), Com1 (1), Com2 (2),
* PP (3), Reserved (4), KBCK (5), KBCM (6), Reserved (7).
*/
it8671f_sio_write(0x00, IT8671F_CONFIG_REG_LDE, 0x6f);
/* Enable serial port(s). */
it8671f_sio_write(IT8671F_SP1, 0x30, 0x01); /* Serial port 1 */
it8671f_sio_write(IT8671F_SP2, 0x30, 0x01); /* Serial port 2 */
it8671f_exit_conf();
}

35
src/superio/ite/it8671f/it8671f.h
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@@ -1,35 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef SUPERIO_ITE_IT8671F_H
#define SUPERIO_ITE_IT8671F_H
#include <device/pnp_type.h>
#include <stdint.h>
/* Datasheet: Not available online, got it from ITE per request. */
#define IT8671F_FDC 0x00 /* Floppy */
#define IT8671F_SP1 0x01 /* Com1 */
#define IT8671F_SP2 0x02 /* Com2 */
#define IT8671F_PP 0x03 /* Parallel port */
#define IT8671F_KBCK 0x05 /* PS/2 keyboard */
#define IT8671F_KBCM 0x06 /* PS/2 mouse */
void it8671f_48mhz_clkin(void);
void it8671f_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_ITE_IT8671F_H */

68
src/superio/ite/it8671f/superio.c
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@@ -1,68 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <device/device.h>
#include <device/pnp.h>
#include <pc80/keyboard.h>
#include <stdlib.h>
#include <superio/conf_mode.h>
#include "it8671f.h"
static void init(struct device *dev)
{
if (!dev->enabled)
return;
switch (dev->path.pnp.device) {
case IT8671F_FDC: /* TODO. */
break;
case IT8671F_PP: /* TODO. */
break;
case IT8671F_KBCK:
pc_keyboard_init(NO_AUX_DEVICE);
break;
case IT8671F_KBCM: /* TODO. */
break;
}
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
.set_resources = pnp_set_resources,
.enable_resources = pnp_enable_resources,
.enable = pnp_enable,
.init = init,
.ops_pnp_mode = &pnp_conf_mode_870155_aa,
};
/* TODO: FDC, PP, KBCM. */
static struct pnp_info pnp_dev_info[] = {
{ NULL, IT8671F_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, IT8671F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1,
0x07f8, },
{ NULL, IT8671F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07f8, 0x07f8, },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_ite_it8671f_ops = {
CHIP_NAME("ITE IT8671F Super I/O")
.enable_dev = enable_dev,
};

25
src/superio/ite/it8716f/Kconfig
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@@ -1,25 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2009 Ronald G. Minnich
## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
config SUPERIO_ITE_IT8716F
bool
select SUPERIO_ITE_COMMON_PRE_RAM
config SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL
bool
depends on SUPERIO_ITE_IT8716F
default n
select SUPERIO_ITE_COMMON_PRE_RAM

17
src/superio/ite/it8716f/Makefile.inc
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@@ -1,17 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
ramstage-$(CONFIG_SUPERIO_ITE_IT8716F) += superio.c

40
src/superio/ite/it8716f/it8716f.h
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@@ -1,40 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef SUPERIO_ITE_IT8716F_H
#define SUPERIO_ITE_IT8716F_H
#include <stdint.h>
/* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8716_2.asp */
/* Logical device numbers (LDNs). */
#define IT8716F_FDC 0x00 /* Floppy */
#define IT8716F_SP1 0x01 /* Com1 */
#define IT8716F_SP2 0x02 /* Com2 */
#define IT8716F_PP 0x03 /* Parallel port */
#define IT8716F_EC 0x04 /* Environment controller */
#define IT8716F_KBCK 0x05 /* PS/2 keyboard */
#define IT8716F_KBCM 0x06 /* PS/2 mouse */
#define IT8716F_GPIO 0x07 /* GPIO */
#define IT8716F_MIDI 0x08 /* MIDI port */
#define IT8716F_GAME 0x09 /* GAME port */
#define IT8716F_IR 0x0a /* Consumer IR */
/* Provided by mainboard, called by IT8716F superio.c. */
void init_ec(u16 base);
#endif /* SUPERIO_ITE_IT8716F_H */

100
src/superio/ite/it8716f/superio.c
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@@ -1,100 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
* Copyright (C) 2007 AMD
* (Written by Yinghai Lu <yinghai.lu@amd.com> for AMD)
* Copyright (C) 2007 Ward Vandewege <ward@gnu.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
#include <pc80/keyboard.h>
#include <stdlib.h>
#include <superio/conf_mode.h>
#include "it8716f.h"
#if !CONFIG(SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL)
void init_ec(u16 base)
{
u8 value;
/* Read out current value of FAN_CTL (0x14). */
value = pnp_read_index(base, 0x14);
printk(BIOS_DEBUG, "FAN_CTL: reg = 0x%04x, read value = 0x%02x\n",
base + 0x14, value);
/* Set FAN_CTL (0x14) polarity to high, activate fans 1, 2 and 3. */
pnp_write_index(base, 0x14, value | 0x87);
printk(BIOS_DEBUG, "FAN_CTL: reg = 0x%04x, writing value = 0x%02x\n",
base + 0x14, value | 0x87);
}
#endif
static void it8716f_init(struct device *dev)
{
struct resource *res0;
if (!dev->enabled)
return;
/* TODO: FDC, PP, KBCM, MIDI, GAME, IR. */
switch (dev->path.pnp.device) {
case IT8716F_EC:
res0 = find_resource(dev, PNP_IDX_IO0);
#define EC_INDEX_PORT 5
init_ec(res0->base + EC_INDEX_PORT);
break;
case IT8716F_KBCK:
pc_keyboard_init(NO_AUX_DEVICE);
break;
}
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
.set_resources = pnp_set_resources,
.enable_resources = pnp_enable_resources,
.enable = pnp_alt_enable,
.init = it8716f_init,
.ops_pnp_mode = &pnp_conf_mode_870155_aa,
};
static struct pnp_info pnp_dev_info[] = {
{ NULL, IT8716F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x0ff8, },
{ NULL, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
{ NULL, IT8716F_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
{ NULL, IT8716F_PP, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_DRQ0,
0x0ff8, 0x0ffc, },
{ NULL, IT8716F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0ff8, 0x0ff8, },
{ NULL, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0fff, 0x0fff, },
{ NULL, IT8716F_KBCM, PNP_IRQ0, },
{ NULL, IT8716F_GPIO, PNP_IO0 | PNP_IO1 | PNP_IO2,
0x0ff8, 0x0ff8, 0x0ff8, },
{ NULL, IT8716F_MIDI, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
{ NULL, IT8716F_GAME, PNP_IO0, 0x0ff8, },
{ NULL, IT8716F_IR, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_ite_it8716f_ops = {
CHIP_NAME("ITE IT8716F Super I/O")
.enable_dev = enable_dev,
};