tpm: Add Ti50 OpenTitan DID_VID
The OpenTitan HW implements the same firmware interface as the Ti50 H1D3C hardware variant; it just has a different DID_VID. Allow this new DID_VID to be recognized correctly. BUG=b:324940153 Change-Id: Iaacf6d88bc6067948756c465aac1cd8b24ecae1f Signed-off-by: Jett Rink <jettrink@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83033 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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		| @@ -34,7 +34,8 @@ | |||||||
| #define CR50_TIMEOUT_LONG_MS	2000	/* Long timeout while waiting for TPM */ | #define CR50_TIMEOUT_LONG_MS	2000	/* Long timeout while waiting for TPM */ | ||||||
| #define CR50_TIMEOUT_SHORT_MS	2	/* Short timeout during transactions */ | #define CR50_TIMEOUT_SHORT_MS	2	/* Short timeout during transactions */ | ||||||
| #define CR50_DID_VID		0x00281ae0L | #define CR50_DID_VID		0x00281ae0L | ||||||
| #define TI50_DID_VID		0x504a6666L | #define TI50_DT_DID_VID		0x504a6666L | ||||||
|  | #define TI50_OT_DID_VID		0x50666666L | ||||||
|  |  | ||||||
| struct tpm_inf_dev { | struct tpm_inf_dev { | ||||||
| 	int bus; | 	int bus; | ||||||
| @@ -449,7 +450,8 @@ static tpm_result_t cr50_i2c_probe(uint32_t *did_vid) | |||||||
| 		rc = cr50_i2c_read(TPM_DID_VID(0), (uint8_t *)did_vid, 4); | 		rc = cr50_i2c_read(TPM_DID_VID(0), (uint8_t *)did_vid, 4); | ||||||
|  |  | ||||||
| 		/* Exit once DID and VID verified */ | 		/* Exit once DID and VID verified */ | ||||||
| 		if (!rc && (*did_vid == CR50_DID_VID || *did_vid == TI50_DID_VID)) { | 		if (!rc && (*did_vid == CR50_DID_VID || *did_vid == TI50_DT_DID_VID || | ||||||
|  | 			    *did_vid == TI50_OT_DID_VID)) { | ||||||
| 			printk(BIOS_INFO, "done! DID_VID 0x%08x\n", *did_vid); | 			printk(BIOS_INFO, "done! DID_VID 0x%08x\n", *did_vid); | ||||||
| 			return TPM_SUCCESS; | 			return TPM_SUCCESS; | ||||||
| 		} | 		} | ||||||
|   | |||||||
| @@ -391,6 +391,7 @@ static enum cb_err tpm2_claim_locality(void) | |||||||
| static const uint32_t supported_did_vids[] = { | static const uint32_t supported_did_vids[] = { | ||||||
| 	0x00281ae0,  /* H1 based Cr50 security chip. */ | 	0x00281ae0,  /* H1 based Cr50 security chip. */ | ||||||
| 	0x504a6666,  /* H1D3C based Ti50 security chip. */ | 	0x504a6666,  /* H1D3C based Ti50 security chip. */ | ||||||
|  | 	0x50666666,  /* OpenTitan based Ti50 security chip. */ | ||||||
| 	0x0000104a   /* ST33HTPH2E32 */ | 	0x0000104a   /* ST33HTPH2E32 */ | ||||||
| }; | }; | ||||||
|  |  | ||||||
|   | |||||||
| @@ -8,7 +8,8 @@ | |||||||
| #include <types.h> | #include <types.h> | ||||||
|  |  | ||||||
| #define CR50_DID_VID	0x00281ae0L | #define CR50_DID_VID	0x00281ae0L | ||||||
| #define TI50_DID_VID	0x504a6666L | #define TI50_DT_DID_VID	0x504a6666L | ||||||
|  | #define TI50_OT_DID_VID	0x50666666L | ||||||
|  |  | ||||||
| #define CR50_BOARD_CFG_LOCKBIT_MASK 0x80000000U | #define CR50_BOARD_CFG_LOCKBIT_MASK 0x80000000U | ||||||
| #define CR50_BOARD_CFG_FEATUREBITS_MASK 0x3FFFFFFFU | #define CR50_BOARD_CFG_FEATUREBITS_MASK 0x3FFFFFFFU | ||||||
|   | |||||||
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