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nb/intel/nehalem: Use system_reset() and full_reset()

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Use already defined system_reset() and full_reset() functions.

Change-Id: Ib7e399b5186aa704d0388c4a4b18480f2e3799f3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32495
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Elyes HAOUAS
2019-04-28 18:04:35 +02:00
committed by Nico Huber
parent 82d4642805
commit d45f33804d
1 changed files with 5 additions and 8 deletions
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13
src/northbridge/intel/nehalem/raminit.c
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@@ -22,6 +22,7 @@
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include <cbmem.h> #include <cbmem.h>
#include <cf9_reset.h>
#include <arch/cbfs.h> #include <arch/cbfs.h>
#include <ip_checksum.h> #include <ip_checksum.h>
#include <pc80/mc146818rtc.h> #include <pc80/mc146818rtc.h>
@@ -3681,8 +3682,7 @@ void chipset_init(const int s3resume)
if ((x2ca8 & 1) || (x2ca8 == 8 && !s3resume)) { if ((x2ca8 & 1) || (x2ca8 == 8 && !s3resume)) {
printk(BIOS_DEBUG, "soft reset detected, rebooting properly\n"); printk(BIOS_DEBUG, "soft reset detected, rebooting properly\n");
MCHBAR8(0x2ca8) = 0; MCHBAR8(0x2ca8) = 0;
outb(0x6, 0xcf9); system_reset();
halt();
} }
#if 0 #if 0
if (!s3resume) { if (!s3resume) {
@@ -3907,8 +3907,7 @@ void raminit(const int s3resume, const u8 *spd_addrmap)
printk(BIOS_INFO, printk(BIOS_INFO,
"Interrupted RAM init, reset required.\n"); "Interrupted RAM init, reset required.\n");
outb(0x6, 0xcf9); system_reset();
halt();
} }
} }
@@ -4346,8 +4345,7 @@ void raminit(const int s3resume, const u8 *spd_addrmap)
"Couldn't find training data. Rebooting\n"); "Couldn't find training data. Rebooting\n");
reg32 = inl(DEFAULT_PMBASE + 0x04); reg32 = inl(DEFAULT_PMBASE + 0x04);
outl(reg32 & ~(7 << 10), DEFAULT_PMBASE + 0x04); outl(reg32 & ~(7 << 10), DEFAULT_PMBASE + 0x04);
outb(0xe, 0xcf9); full_reset();
halt();
} }
int tm; int tm;
info.training = *info.cached_training; info.training = *info.cached_training;
@@ -4788,7 +4786,6 @@ void raminit(const int s3resume, const u8 *spd_addrmap)
outl(reg32 & ~(7 << 10), DEFAULT_PMBASE + 0x04); outl(reg32 & ~(7 << 10), DEFAULT_PMBASE + 0x04);
/* Failed S3 resume, reset to come up cleanly */ /* Failed S3 resume, reset to come up cleanly */
outb(0xe, 0xcf9); full_reset();
halt();
} }
} }