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amdfam10 boards: Drop global bus_isa variable

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Value of the global is never evaluated.

Change-Id: I74106b0f5f033053288882a5bcd3c1dba3235ac0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki
2019-01-03 11:38:35 +02:00
parent 1db4e3a358
commit d482c7dace
19 changed files with 4 additions and 62 deletions
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8
src/mainboard/advansus/a785e-i/get_bus_conf.c
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@@ -23,7 +23,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable /* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default. * and acpi_tables busnum is default.
*/ */
int bus_isa;
u8 bus_rs780[11]; u8 bus_rs780[11];
u8 bus_sb800[6]; u8 bus_sb800[6];
u32 apicid_sb800; u32 apicid_sb800;
@@ -88,16 +87,12 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4)); dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
if (dev) { if (dev) {
bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x15, i)); dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x15, i));
if (dev) { if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
} }
@@ -107,14 +102,11 @@ void get_bus_conf(void)
if (dev) { if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) { if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
} }
} }
/* I/O APICs: APIC ID Version State Address */ /* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
apicid_base = get_apicid_base(1); apicid_base = get_apicid_base(1);
else else

1
src/mainboard/advansus/a785e-i/irq_tables.c
View File

@@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu; pirq_info->rfu = rfu;
} }
extern u8 bus_isa;
extern u8 bus_rs780[8]; extern u8 bus_rs780[8];
extern u8 bus_sb800[6]; extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800; extern unsigned long sbdn_sb800;

2
src/mainboard/advansus/a785e-i/mptable.c
View File

@@ -20,7 +20,6 @@
#include <stdint.h> #include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h> #include <cpu/amd/amdfam10_sysconf.h>
extern int bus_isa;
extern u8 bus_rs780[11]; extern u8 bus_rs780[11];
extern u8 bus_sb800[6]; extern u8 bus_sb800[6];
extern u32 apicid_sb800; extern u32 apicid_sb800;
@@ -40,6 +39,7 @@ u8 intr_data[] = {
static void *smp_write_config_table(void *v) static void *smp_write_config_table(void *v)
{ {
struct mp_config_table *mc; struct mp_config_table *mc;
int bus_isa;
u32 dword = 0; u32 dword = 0;
u8 byte; u8 byte;

8
src/mainboard/amd/bimini_fam10/get_bus_conf.c
View File

@@ -23,7 +23,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable /* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default. * and acpi_tables busnum is default.
*/ */
int bus_isa;
u8 bus_rs780[11]; u8 bus_rs780[11];
u8 bus_sb800[6]; u8 bus_sb800[6];
u32 apicid_sb800; u32 apicid_sb800;
@@ -87,16 +86,12 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4)); dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
if (dev) { if (dev) {
bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x15, i)); dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x15, i));
if (dev) { if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
} }
@@ -106,14 +101,11 @@ void get_bus_conf(void)
if (dev) { if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) { if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
} }
} }
/* I/O APICs: APIC ID Version State Address */ /* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
apicid_base = get_apicid_base(1); apicid_base = get_apicid_base(1);
else else

1
src/mainboard/amd/bimini_fam10/irq_tables.c
View File

@@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu; pirq_info->rfu = rfu;
} }
extern u8 bus_isa;
extern u8 bus_rs780[8]; extern u8 bus_rs780[8];
extern u8 bus_sb800[6]; extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800; extern unsigned long sbdn_sb800;

2
src/mainboard/amd/bimini_fam10/mptable.c
View File

@@ -21,7 +21,6 @@
#include <southbridge/amd/sb800/sb800.h> #include <southbridge/amd/sb800/sb800.h>
#include <cpu/amd/amdfam10_sysconf.h> #include <cpu/amd/amdfam10_sysconf.h>
extern int bus_isa;
extern u8 bus_rs780[11]; extern u8 bus_rs780[11];
extern u8 bus_sb800[6]; extern u8 bus_sb800[6];
extern u32 apicid_sb800; extern u32 apicid_sb800;
@@ -41,6 +40,7 @@ u8 intr_data[] = {
static void *smp_write_config_table(void *v) static void *smp_write_config_table(void *v)
{ {
struct mp_config_table *mc; struct mp_config_table *mc;
int bus_isa;
u32 dword; u32 dword;
u8 byte; u8 byte;

6
src/mainboard/asus/kcma-d8/get_bus_conf.c
View File

@@ -25,7 +25,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable /* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default. * and acpi_tables busnum is default.
*/ */
u8 bus_isa;
u8 bus_sr5650[14]; u8 bus_sr5650[14];
u8 bus_sp5100[2]; u8 bus_sp5100[2];
u32 apicid_sp5100; u32 apicid_sp5100;
@@ -91,8 +90,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4)); dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4));
if (dev) { if (dev) {
bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
/* sr5650 */ /* sr5650 */
@@ -101,14 +98,11 @@ void get_bus_conf(void)
if (dev) { if (dev) {
bus_sr5650[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sr5650[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_sr5650[i]) { if(255 != bus_sr5650[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
} }
} }
/* I/O APICs: APIC ID Version State Address */ /* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
apicid_base = get_apicid_base(1); apicid_base = get_apicid_base(1);
else else

1
src/mainboard/asus/kcma-d8/irq_tables.c
View File

@@ -60,7 +60,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu; pirq_info->rfu = rfu;
} }
extern u8 bus_isa;
extern u8 bus_sr5650[14]; extern u8 bus_sr5650[14];
extern u8 bus_sp5100[2]; extern u8 bus_sp5100[2];
extern u32 sbdn_sp5100; extern u32 sbdn_sp5100;

1
src/mainboard/asus/kfsn4-dre/irq_tables.c
View File

@@ -30,7 +30,6 @@
#include <arch/pirq_routing.h> #include <arch/pirq_routing.h>
#include <cpu/amd/amdfam10_sysconf.h> #include <cpu/amd/amdfam10_sysconf.h>
extern unsigned char bus_isa;
extern unsigned char bus_ck804[6]; extern unsigned char bus_ck804[6];

6
src/mainboard/asus/kgpe-d16/get_bus_conf.c
View File

@@ -25,7 +25,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable /* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default. * and acpi_tables busnum is default.
*/ */
u8 bus_isa;
u8 bus_sr5650[14]; u8 bus_sr5650[14];
u8 bus_sp5100[2]; u8 bus_sp5100[2];
u32 apicid_sp5100; u32 apicid_sp5100;
@@ -91,8 +90,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4)); dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4));
if (dev) { if (dev) {
bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
/* sr5650 */ /* sr5650 */
@@ -101,14 +98,11 @@ void get_bus_conf(void)
if (dev) { if (dev) {
bus_sr5650[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sr5650[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_sr5650[i]) { if(255 != bus_sr5650[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
} }
} }
/* I/O APICs: APIC ID Version State Address */ /* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
apicid_base = get_apicid_base(1); apicid_base = get_apicid_base(1);
else else

1
src/mainboard/asus/kgpe-d16/irq_tables.c
View File

@@ -60,7 +60,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu; pirq_info->rfu = rfu;
} }
extern u8 bus_isa;
extern u8 bus_sr5650[14]; extern u8 bus_sr5650[14];
extern u8 bus_sp5100[2]; extern u8 bus_sp5100[2];
extern u32 sbdn_sp5100; extern u32 sbdn_sp5100;

8
src/mainboard/asus/m5a88-v/get_bus_conf.c
View File

@@ -23,7 +23,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable /* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default. * and acpi_tables busnum is default.
*/ */
int bus_isa;
u8 bus_rs780[11]; u8 bus_rs780[11];
u8 bus_sb800[6]; u8 bus_sb800[6];
u32 apicid_sb800; u32 apicid_sb800;
@@ -88,16 +87,12 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4)); dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
if (dev) { if (dev) {
bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x15, i)); dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x15, i));
if (dev) { if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
} }
@@ -107,14 +102,11 @@ void get_bus_conf(void)
if (dev) { if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) { if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
} }
} }
/* I/O APICs: APIC ID Version State Address */ /* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
apicid_base = get_apicid_base(1); apicid_base = get_apicid_base(1);
else else

1
src/mainboard/asus/m5a88-v/irq_tables.c
View File

@@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu; pirq_info->rfu = rfu;
} }
extern u8 bus_isa;
extern u8 bus_rs780[8]; extern u8 bus_rs780[8];
extern u8 bus_sb800[6]; extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800; extern unsigned long sbdn_sb800;

2
src/mainboard/asus/m5a88-v/mptable.c
View File

@@ -20,7 +20,6 @@
#include <stdint.h> #include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h> #include <cpu/amd/amdfam10_sysconf.h>
extern int bus_isa;
extern u8 bus_rs780[11]; extern u8 bus_rs780[11];
extern u8 bus_sb800[6]; extern u8 bus_sb800[6];
extern u32 apicid_sb800; extern u32 apicid_sb800;
@@ -40,6 +39,7 @@ u8 intr_data[] = {
static void *smp_write_config_table(void *v) static void *smp_write_config_table(void *v)
{ {
struct mp_config_table *mc; struct mp_config_table *mc;
int bus_isa;
u32 dword = 0; u32 dword = 0;
u8 byte; u8 byte;

8
src/mainboard/avalue/eax-785e/get_bus_conf.c
View File

@@ -23,7 +23,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable /* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default. * and acpi_tables busnum is default.
*/ */
int bus_isa;
u8 bus_rs780[11]; u8 bus_rs780[11];
u8 bus_sb800[6]; u8 bus_sb800[6];
u32 apicid_sb800; u32 apicid_sb800;
@@ -88,16 +87,12 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4)); dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
if (dev) { if (dev) {
bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x15, i)); dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x15, i));
if (dev) { if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
} }
@@ -107,14 +102,11 @@ void get_bus_conf(void)
if (dev) { if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) { if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
} }
} }
/* I/O APICs: APIC ID Version State Address */ /* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
apicid_base = get_apicid_base(1); apicid_base = get_apicid_base(1);
else else

1
src/mainboard/avalue/eax-785e/irq_tables.c
View File

@@ -39,7 +39,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu; pirq_info->rfu = rfu;
} }
extern u8 bus_isa;
extern u8 bus_rs780[8]; extern u8 bus_rs780[8];
extern u8 bus_sb800[6]; extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800; extern unsigned long sbdn_sb800;

2
src/mainboard/avalue/eax-785e/mptable.c
View File

@@ -20,7 +20,6 @@
#include <stdint.h> #include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h> #include <cpu/amd/amdfam10_sysconf.h>
extern int bus_isa;
extern u8 bus_rs780[11]; extern u8 bus_rs780[11];
extern u8 bus_sb800[6]; extern u8 bus_sb800[6];
extern u32 apicid_sb800; extern u32 apicid_sb800;
@@ -40,6 +39,7 @@ u8 intr_data[] = {
static void *smp_write_config_table(void *v) static void *smp_write_config_table(void *v)
{ {
struct mp_config_table *mc; struct mp_config_table *mc;
int bus_isa;
u32 dword = 0; u32 dword = 0;
u8 byte; u8 byte;

6
src/mainboard/supermicro/h8scm_fam10/get_bus_conf.c
View File

@@ -24,7 +24,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable /* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default. * and acpi_tables busnum is default.
*/ */
u8 bus_isa;
u8 bus_sr5650[14]; u8 bus_sr5650[14];
u8 bus_sp5100[2]; u8 bus_sp5100[2];
u32 apicid_sp5100; u32 apicid_sp5100;
@@ -90,8 +89,6 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4)); dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4));
if (dev) { if (dev) {
bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
/* sr5650 */ /* sr5650 */
@@ -100,14 +97,11 @@ void get_bus_conf(void)
if (dev) { if (dev) {
bus_sr5650[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); bus_sr5650[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_sr5650[i]) { if(255 != bus_sr5650[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
} }
} }
} }
/* I/O APICs: APIC ID Version State Address */ /* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
apicid_base = get_apicid_base(1); apicid_base = get_apicid_base(1);
else else

1
src/mainboard/supermicro/h8scm_fam10/irq_tables.c
View File

@@ -40,7 +40,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu; pirq_info->rfu = rfu;
} }
extern u8 bus_isa;
extern u8 bus_rs780[8]; extern u8 bus_rs780[8];
extern u8 bus_sp5100[2]; extern u8 bus_sp5100[2];
extern unsigned long sbdn_sp5100; extern unsigned long sbdn_sp5100;