soc/intel/cmn/pmc: Add pmc_ipc to bootblock
This adds pmc_ipc to bootblock if SOC_INTEL_COMMON_BLOCK_PMC is enabled. The good place to report SoC QDF can be report_cpu_info in bootblock. QDF read is done by PMC IPC Command, so this adds pmc_ipc to bootblock to enable calling pmc_dump_soc_qdf_info. Change-Id: Id0391eae48fc53cd652acd09e6380ca6802eaf88 Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83939 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
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@ -7,5 +7,6 @@ ramstage-y += pmclib.c
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smm-y += pmclib.c
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smm-y += pmclib.c
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verstage-y += pmclib.c
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verstage-y += pmclib.c
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postcar-y += pmclib.c
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postcar-y += pmclib.c
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bootblock-$(CONFIG_PMC_IPC_ACPI_INTERFACE) += pmc_ipc.c
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ramstage-$(CONFIG_PMC_IPC_ACPI_INTERFACE) += pmc_ipc.c
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ramstage-$(CONFIG_PMC_IPC_ACPI_INTERFACE) += pmc_ipc.c
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endif
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endif
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@ -97,6 +97,7 @@ enum cb_err pmc_send_ipc_cmd(uint32_t cmd, const struct pmc_ipc_buffer *wbuf,
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return CB_SUCCESS;
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return CB_SUCCESS;
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}
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}
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#if ENV_RAMSTAGE
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void pmc_ipc_acpi_fill_ssdt(void)
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void pmc_ipc_acpi_fill_ssdt(void)
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{
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{
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const struct fieldlist ipcs_fields[] = {
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const struct fieldlist ipcs_fields[] = {
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@ -244,3 +245,4 @@ void pmc_ipc_acpi_set_pci_clock(unsigned int pcie_rp, unsigned int clock_pin, bo
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acpigen_write_dword(data[2]);
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acpigen_write_dword(data[2]);
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acpigen_write_dword(data[3]);
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acpigen_write_dword(data[3]);
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}
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}
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#endif
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