sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/cmn/pmc: Add pmc_ipc to bootblock

Browse Source 
This adds pmc_ipc to bootblock if SOC_INTEL_COMMON_BLOCK_PMC is enabled.
The good place to report SoC QDF can be report_cpu_info in bootblock.
QDF read is done by PMC IPC Command, so this adds pmc_ipc to bootblock
to enable calling pmc_dump_soc_qdf_info.

Change-Id: Id0391eae48fc53cd652acd09e6380ca6802eaf88
Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83939
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Jamie Ryu 2024-08-16 00:26:44 -07:00 committed by Felix Held
parent 8c6f785d5e
commit d4833a6499
2 changed files with 3 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/soc/intel/common/block/pmc/Makefile.mk
View File

@ -7,5 +7,6 @@ ramstage-y += pmclib.c
smm-y += pmclib.c
verstage-y += pmclib.c
postcar-y += pmclib.c
bootblock-$(CONFIG_PMC_IPC_ACPI_INTERFACE) += pmc_ipc.c
ramstage-$(CONFIG_PMC_IPC_ACPI_INTERFACE) += pmc_ipc.c
endif

2
src/soc/intel/common/block/pmc/pmc_ipc.c
View File

@ -97,6 +97,7 @@ enum cb_err pmc_send_ipc_cmd(uint32_t cmd, const struct pmc_ipc_buffer *wbuf,
return CB_SUCCESS;
}
#if ENV_RAMSTAGE
void pmc_ipc_acpi_fill_ssdt(void)
{
const struct fieldlist ipcs_fields[] = {
@ -244,3 +245,4 @@ void pmc_ipc_acpi_set_pci_clock(unsigned int pcie_rp, unsigned int clock_pin, bo
acpigen_write_dword(data[2]);
acpigen_write_dword(data[3]);
}
#endif