fix dell s1850, ROMCC didn't seem to like SSE2 memtest here.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5237 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/intel/model_f0x/Kconfig

@@ -1,4 +1,3 @@
 config CPU_INTEL_MODEL_F0X
 	bool
 	select SMP
-	select SSE2

src/cpu/intel/model_f1x/Kconfig

@@ -1,4 +1,3 @@
 config CPU_INTEL_MODEL_F1X
 	bool
 	select SMP
-	select SSE2

src/cpu/intel/model_f2x/Kconfig

@@ -1,4 +1,3 @@
 config CPU_INTEL_MODEL_F2X
 	bool
 	select SMP
-	select SSE2

src/cpu/intel/model_f3x/Kconfig

@@ -1,4 +1,3 @@
 config CPU_INTEL_MODEL_F3X
 	bool
 	select SMP
-	select SSE2

src/cpu/intel/model_f4x/Kconfig

@@ -1,4 +1,3 @@
 config CPU_INTEL_MODEL_F4X
 	bool
 	select SMP
-	select SSE2

src/cpu/intel/socket_mPGA604/Kconfig

@@ -6,3 +6,11 @@ config CPU_INTEL_SOCKET_MPGA604
 	select MMX
 	select SSE
 	select UDELAY_TSC
+
+# mPGA604 are usually Intel Netburst CPUs which should have SSE2
+# but the ramtest.c code on the Dell S1850 seems to choke on 
+# enabling it, so disable it for now.
+config SSE2
+	bool
+	default n
+	depends on CPU_INTEL_SOCKET_MPGA604

src/mainboard/dell/s1850/Kconfig

@@ -11,6 +11,7 @@ config BOARD_DELL_S1850
 	select BOARD_HAS_HARD_RESET
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
+	select USE_WATCHDOG_ON_BOOT
 	select BOARD_ROMSIZE_KB_1024
 	select UDELAY_TSC
 

src/southbridge/intel/i82801ex/i82801ex_watchdog.c

@@ -1,4 +1,5 @@
 #include <console/console.h>
+#include <watchdog.h>
 #include <arch/io.h>
 #include <device/device.h>
 #include <device/pci.h>