src/intel/xeon_sp: add hardware error support (HEST)

This patch adds the ACPI hardware error source table (HEST) support.
This involves a few different parts: (1) The ACPI HEST table which is filled
with the appropriate fields (2) Reserved memory which is used by runtime
SW to provide error information. OS will not accept a HEST table with
this memory set to 0.

The ASL code to enable APEI bit will be submitted in a separate patch.

Tested on DeltaLake mainboard with following options enabled
SOC_INTEL_XEON_RAS

After boot to Linux, the following will show in dmesg:
HEST: Table parsing has been initialized

Change-Id: If76b2af153616182cc053ca878f30fe056e9c8bd
Signed-off-by: Rocky Phagura <rphagura@fb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52090
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Rocky Phagura
2021-04-03 08:49:32 -07:00
committed by Patrick Georgi
parent 3bfa1bde60
commit d4db36e672
10 changed files with 179 additions and 0 deletions

View File

@@ -6,6 +6,7 @@
#define CBMEM_ID_ACPI 0x41435049
#define CBMEM_ID_ACPI_BERT 0x42455254
#define CBMEM_ID_ACPI_GNVS 0x474e5653
#define CMBMEM_ID_ACPI_HEST 0x48455354
#define CBMEM_ID_ACPI_UCSI 0x55435349
#define CBMEM_ID_AFTER_CAR 0xc4787a93
#define CBMEM_ID_AGESA_RUNTIME 0x41474553
@@ -81,6 +82,7 @@
{ CBMEM_ID_ACPI, "ACPI " }, \
{ CBMEM_ID_ACPI_BERT, "ACPI BERT " }, \
{ CBMEM_ID_ACPI_GNVS, "ACPI GNVS " }, \
{ CMBMEM_ID_ACPI_HEST, "ACPI HEST " }, \
{ CBMEM_ID_ACPI_UCSI, "ACPI UCSI " }, \
{ CBMEM_ID_AGESA_RUNTIME, "AGESA RSVD " }, \
{ CBMEM_ID_AFTER_CAR, "AFTER CAR " }, \