diff --git a/src/mainboard/intel/shadowmountain/dsdt.asl b/src/mainboard/intel/shadowmountain/dsdt.asl
index f94ad378c9..c8dc9ee2c3 100644
--- a/src/mainboard/intel/shadowmountain/dsdt.asl
+++ b/src/mainboard/intel/shadowmountain/dsdt.asl
@@ -1,8 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <acpi/acpi.h>
-#include <baseboard/ec.h>
-#include <baseboard/gpio.h>
 
 DefinitionBlock(
 	"dsdt.aml",
@@ -14,31 +12,4 @@ DefinitionBlock(
 )
 {
 	#include <acpi/dsdt_top.asl>
-	#include <soc/intel/common/block/acpi/acpi/platform.asl>
-
-	/* global NVS and variables */
-	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
-
-	/* CPU */
-	#include <cpu/intel/common/acpi/cpu.asl>
-
-	Scope (\_SB) {
-		Device (PCI0)
-		{
-			#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
-			#include <soc/intel/alderlake/acpi/southbridge.asl>
-			#include <soc/intel/alderlake/acpi/tcss.asl>
-		}
-	}
-
-	/* Chrome OS Embedded Controller */
-	Scope (\_SB.PCI0.LPCB)
-	{
-		// ACPI code for EC SuperIO functions
-		#include <ec/google/chromeec/acpi/superio.asl>
-		// ACPI code for EC functions
-		#include <ec/google/chromeec/acpi/ec.asl>
-	}
-
-	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }