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cpu,soc/intel: Separate single SSDT CPU entry

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Change-Id: Ic75e8907de9730c6fdb06dbe799a7644fa90f904
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74399
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
This commit is contained in:
Kyösti Mälkki
2023-04-12 21:44:49 +03:00
parent 15dd44eedd
commit d521b967c4
6 changed files with 119 additions and 98 deletions
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36
src/soc/intel/baytrail/acpi.c
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@@ -132,7 +132,7 @@ static int calculate_power(int tdp, int p1_ratio, int ratio)
return (int)power;
}
static void generate_p_state_entries(int core, int cores_per_package)
static void generate_p_state_entries(int core)
{
int ratio_min, ratio_max, ratio_turbo, ratio_step, ratio_range_2;
int coord_type, power_max, power_unit, num_entries;
@@ -247,26 +247,30 @@ static void generate_p_state_entries(int core, int cores_per_package)
acpigen_pop_len();
}
static void generate_cpu_entry(int core, int cores_per_package)
{
/* Generate Scope(\_SB) { Device(CPUx */
acpigen_write_processor_device(core);
/* Generate P-state tables */
generate_p_state_entries(core);
/* Generate C-state tables */
acpigen_write_CST_package(cstate_map, ARRAY_SIZE(cstate_map));
/* Generate T-state tables */
generate_t_state_entries(core, cores_per_package);
acpigen_write_processor_device_end();
}
void generate_cpu_entries(const struct device *device)
{
int core;
const struct pattrs *pattrs = pattrs_get();
for (core = 0; core < pattrs->num_cpus; core++) {
/* Generate Scope(\_SB) { Device(CPUx */
acpigen_write_processor_device(core);
/* Generate P-state tables */
generate_p_state_entries(core, pattrs->num_cpus);
/* Generate C-state tables */
acpigen_write_CST_package(cstate_map, ARRAY_SIZE(cstate_map));
/* Generate T-state tables */
generate_t_state_entries(core, pattrs->num_cpus);
acpigen_write_processor_device_end();
}
for (core = 0; core < pattrs->num_cpus; core++)
generate_cpu_entry(core, pattrs->num_cpus);
/* PPKG is usually used for thermal management
of the first and only package. */