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mb/google/brya : Set EPP value for Vell board

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The patch sets the EPP to 50% (0x80) for Vell. With EPP at 50%, the Vell
system demonstrated better power improvement without sacrificing the
performance.

PLT Results(Perf) with EPP@40% and EPP@50%:
	EPP@40%: Device1-656 mins, Device2-664 mins.
	EPP@50%: Device1-678 mins, Device2-677 mins.

In short, with EPP@50%, PLT KPI ran for more than 13 to 22mins compared
to EPP@40%.

Branch=firmware-brya-14505.B
BUG=b:215526166
TEST=Verified code build for Vell board

Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I41b15b84025d25cf59dac2d85826a3de9d725bae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Sridhar Siricilla 2022-10-26 17:03:25 +05:30 committed by Felix Held
parent 00f227a216
commit d55ed57c36
1 changed files with 4 additions and 0 deletions
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4
src/mainboard/google/brya/variants/vell/overridetree.cb
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@ -76,6 +76,10 @@ chip soc/intel/alderlake
register "tcss_ports[3]" = "TCSS_PORT_DEFAULT(OC3)" register "tcss_ports[3]" = "TCSS_PORT_DEFAULT(OC3)"
register "sagv" = "SaGv_Enabled" register "sagv" = "SaGv_Enabled"
# Set EPP to 50%: 50 * 256 / 100 = 0x80
register "enable_energy_perf_pref" = "true"
register "energy_perf_pref_value" = "0x80"
# FIVR RFI Spread Spectrum 6% # FIVR RFI Spread Spectrum 6%
register "fivr_spread_spectrum" = "FIVR_SS_6" register "fivr_spread_spectrum" = "FIVR_SS_6"