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mb/google/rex/var/screebo: Disable FVM

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This patch disables FVM for IA and SA VRs as per the OEM requirement.

BUG=b:307237761
TEST=Able to build and boot google/screebo.

Change-Id: Icb0611331ac7090d11d646a5ad5201593a90aacb
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78662
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
Subrata Banik
2023-10-26 19:55:56 +05:30
parent e4ac7b16ef
commit d581878264
1 changed files with 8 additions and 0 deletions
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8
src/mainboard/google/rex/variants/screebo/overridetree.cb
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@@ -40,6 +40,14 @@ chip soc/intel/meteorlake
.tdp_pl4 = 84, .tdp_pl4 = 84,
}" }"
# Override FVM and VR (IA and SA) configuration: Disable
register "enable_fast_vmode[VR_DOMAIN_IA]" = "0"
register "cep_enable[VR_DOMAIN_IA]" = "0"
register "fast_vmode_i_trip[VR_DOMAIN_IA]" = "0"
register "enable_fast_vmode[VR_DOMAIN_SA]" = "0"
register "cep_enable[VR_DOMAIN_SA]" = "0"
register "fast_vmode_i_trip[VR_DOMAIN_SA]" = "0"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC1)" # USB2_C1 register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC1)" # USB2_C1
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC0)" # USB2_C0 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC0)" # USB2_C0
register "usb2_ports[2]" = "USB2_PORT_MID(OC2)" # Type-A Port A1 register "usb2_ports[2]" = "USB2_PORT_MID(OC2)" # Type-A Port A1