Enable NVIDIA GPU and ACPI backlight

Change-Id: If92c122ab2eaf0ef6fad13e2fe42b0532a25ee15

src/mainboard/system76/galp5/Kconfig

@@ -5,7 +5,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select BOARD_ROMSIZE_KB_16384
 	select DRIVERS_I2C_HID
 	select DRIVERS_INTEL_PMC
-	#TODO select DRIVERS_SYSTEM76_DGPU
+	select DRIVERS_SYSTEM76_DGPU
 	select EC_SYSTEM76_EC
 	#TODO select EC_SYSTEM76_EC_BAT_THRESHOLDS
 	select EC_SYSTEM76_EC_DGPU

src/mainboard/system76/galp5/acpi/backlight.asl

@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <drivers/intel/gma/acpi/gma.asl>
+
+Scope (GFX0) {
+       Name (BRIG, Package (22) {
+                40, /* default AC */
+                40, /* default Battery */
+                 5,
+                10,
+                15,
+                20,
+                25,
+                30,
+                35,
+                40,
+                45,
+                50,
+                55,
+                60,
+                65,
+                70,
+                75,
+                80,
+                85,
+                90,
+                95,
+               100
+       })
+}

src/mainboard/system76/galp5/acpi/mainboard.asl

@@ -1,27 +1,15 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include "../gpio.h"
-#if CONFIG(DRIVERS_SYSTEM76_DGPU)
+// TODO: use correct scope #include <drivers/system76/dgpu/acpi/dgpu.asl>
-	#include <drivers/system76/dgpu/acpi/dgpu.asl>
-#endif
 
 #define EC_GPE_SCI 0x6E
 #define EC_GPE_SWI 0x6B
 #include <ec/system76/ec/acpi/ec.asl>
 
 Scope (\_SB) {
-	/* Method called from _PTS prior to enter sleep state */
+	#include "sleep.asl"
-	Method (MPTS, 1) {
+	Scope (PCI0) {
-		\_SB.PCI0.LPCB.EC0.PTS (Arg0)
+		#include "backlight.asl"
-
-#if CONFIG(DRIVERS_SYSTEM76_DGPU)
-		// Turn DGPU on before sleeping
-		\_SB.PCI0.PEGP.DEV0._ON()
-#endif
-	}
-
-	/* Method called from _WAK prior to wakeup */
-	Method (MWAK, 1) {
-		\_SB.PCI0.LPCB.EC0.WAK (Arg0)
 	}
 }

src/mainboard/system76/galp5/acpi/sleep.asl

@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* Method called from _PTS prior to enter sleep state */
+Method (MPTS, 1) {
+	\_SB.PCI0.LPCB.EC0.PTS (Arg0)
+
+	// Turn DGPU on before sleeping
+	//TODO: use correct scope \_SB.PCI0.PEGP.DEV0._ON()
+}
+
+/* Method called from _WAK prior to wakeup */
+Method (MWAK, 1) {
+	\_SB.PCI0.LPCB.EC0.WAK (Arg0)
+}

src/mainboard/system76/galp5/bootblock.c

@@ -3,13 +3,9 @@
 #include <bootblock_common.h>
 #include <gpio.h>
 #include "gpio.h"
-#if CONFIG(DRIVERS_SYSTEM76_DGPU)
+#include <drivers/system76/dgpu/bootblock.c>
-	#include <drivers/system76/dgpu/bootblock.c>
-#endif
 
 void bootblock_mainboard_init(void) {
 	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
-#if CONFIG(DRIVERS_SYSTEM76_DGPU)
 	dgpu_power_enable(1);
-#endif
 }

src/mainboard/system76/galp5/dsdt.asl

@@ -1,5 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+//TODO: cleaner solution for ACPI brightness
+#define SYSTEM76_ACPI_NO_GFX0
+
 #include <acpi/acpi.h>
 DefinitionBlock(
 	"dsdt.aml",
@@ -14,19 +17,17 @@ DefinitionBlock(
 	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
 	#include <cpu/intel/common/acpi/cpu.asl>
 
-	Scope (\_SB) {
+	Device (\_SB.PCI0) {
-		Device (PCI0) {
+		#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
-			#include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+		#include <soc/intel/tigerlake/acpi/southbridge.asl>
-			#include <soc/intel/tigerlake/acpi/southbridge.asl>
+		#include <soc/intel/tigerlake/acpi/tcss.asl>
-			#include <soc/intel/tigerlake/acpi/tcss.asl>
-		}
 	}
 
+	#include <southbridge/intel/common/acpi/sleepstates.asl>
+
 	Scope (\_SB.PCI0.LPCB) {
 		#include <drivers/pc80/pc/ps2_controller.asl>
 	}
 
 	#include "acpi/mainboard.asl"
-
-	#include <southbridge/intel/common/acpi/sleepstates.asl>
 }

src/mainboard/system76/galp5/gpio.h

@@ -414,9 +414,9 @@ static const struct pad_config gpio_table[] = {
 		// NC
 		PAD_NC(GPP_T3, NONE),
 		// DGPU_RST#_PCH
-		//TODO PAD_CFG_TERM_GPO(GPP_U4, 1, NONE, PLTRST),
+		PAD_CFG_TERM_GPO(GPP_U4, 1, NONE, DEEP),
 		// DGPU_PWR_EN
-		//TODO PAD_CFG_TERM_GPO(GPP_U5, 1, NONE, PLTRST),
+		PAD_CFG_TERM_GPO(GPP_U5, 1, NONE, DEEP),
 };
 
 #endif