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soc/intel/baytrail: Implement POSTCAR stage

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Use common code to tear down CAR.

Change-Id: I62a70ae35fe92808f180f2b5f21c5899a96c2c16
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Arthur Heymans
2018-11-29 14:16:49 +01:00
committed by Patrick Georgi
parent f6cfbf3804
commit d5d20d03fe
4 changed files with 15 additions and 90 deletions
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2
src/soc/intel/baytrail/Kconfig
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@@ -38,6 +38,8 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_SPI_CONSOLE_SUPPORT
select INTEL_GMA_ACPI
select INTEL_GMA_SWSMISCI
select POSTCAR_STAGE
select POSTCAR_CONSOLE
config VBOOT
select VBOOT_STARTS_IN_ROMSTAGE

4
src/soc/intel/baytrail/Makefile.inc
View File

@@ -10,6 +10,7 @@ subdirs-y += ../../../cpu/intel/turbo
ramstage-y += memmap.c
romstage-y += memmap.c
postcar-y += memmap.c
ramstage-y += tsc_freq.c
romstage-y += tsc_freq.c
smm-y += tsc_freq.c
@@ -20,6 +21,7 @@ ramstage-y += gfx.c
ramstage-y += iosf.c
romstage-y += iosf.c
smm-y += iosf.c
postcar-y += iosf.c
ramstage-y += northcluster.c
ramstage-y += ramstage.c
ramstage-y += gpio.c
@@ -51,6 +53,8 @@ ramstage-y += hda.c
# Remove as ramstage gets fleshed out
ramstage-y += placeholders.c
postcar-y += ../../../cpu/intel/car/non-evict/exit_car.S
cpu_microcode_bins += 3rdparty/blobs/soc/intel/baytrail/microcode.bin
CPPFLAGS_common += -Isrc/soc/intel/baytrail/include

88
src/soc/intel/baytrail/romstage/cache_as_ram.inc
View File

@@ -197,95 +197,11 @@ before_romstage:
post_code(0x2a)
/* Call romstage.c main function. */
call romstage_main
/* Save return value from romstage_main. It contains the stack to use
* after cache-as-ram is torn down. It also contains the information
* for setting up MTRRs. */
movl %eax, %ebx
post_code(0x2b)
/* Disable cache. */
movl %cr0, %eax
orl $CR0_CacheDisable, %eax
movl %eax, %cr0
post_code(0x2c)
/* Disable MTRR. */
movl $MTRR_DEF_TYPE_MSR, %ecx
rdmsr
andl $(~MTRR_DEF_TYPE_EN), %eax
wrmsr
invd
post_code(0x2d)
/* Disable the no eviction run state */
movl $NoEvictMod_MSR, %ecx
rdmsr
andl $~2, %eax
wrmsr
/* Disable the no eviction mode */
rdmsr
andl $~1, %eax
wrmsr
post_code(0x2e)
/* Setup stack as indicated by return value from romstage_main(). */
movl %ebx, %esp
/* Get number of MTRRs. */
popl %ebx
movl $MTRR_PHYS_BASE(0), %ecx
1:
testl %ebx, %ebx
jz 1f
/* Low 32 bits of MTRR base. */
popl %eax
/* Upper 32 bits of MTRR base. */
popl %edx
/* Write MTRR base. */
wrmsr
inc %ecx
/* Low 32 bits of MTRR mask. */
popl %eax
/* Upper 32 bits of MTRR mask. */
popl %edx
/* Write MTRR mask. */
wrmsr
inc %ecx
dec %ebx
jmp 1b
1:
post_code(0x2f)
/* And enable cache again after setting MTRRs. */
movl %cr0, %eax
andl $~(CR0_CacheDisable | CR0_NoWriteThrough), %eax
movl %eax, %cr0
post_code(0x30)
/* Enable MTRR. */
movl $MTRR_DEF_TYPE_MSR, %ecx
rdmsr
orl $MTRR_DEF_TYPE_EN, %eax
wrmsr
post_code(0x31)
__main:
post_code(POST_PREPARE_RAMSTAGE)
cld /* Clear direction flag. */
call romstage_after_car
/* Should never see this postcode */
post_code(POST_DEAD_CODE)
.Lhlt:
post_code(POST_DEAD_CODE)
hlt
jmp .Lhlt

11
src/soc/intel/baytrail/romstage/romstage.c
View File

@@ -47,7 +47,7 @@
* Because we can't use global variables the stack is used for allocations --
* thus the need to call back and forth. */
static void *setup_stack_and_mtrrs(void);
static void platform_enter_postcar(void);
static void program_base_addresses(void)
{
@@ -128,7 +128,10 @@ void *asmlinkage romstage_main(unsigned long bist, uint32_t tsc_low,
/* Call into mainboard. */
mainboard_romstage_entry(&rp);
return setup_stack_and_mtrrs();
platform_enter_postcar();
/* We don't return here */
return NULL;
}
static struct chipset_power_state power_state CAR_GLOBAL;
@@ -245,7 +248,7 @@ static inline uint32_t *stack_push(u32 *stack, u32 value)
/* setup_stack_and_mtrrs() determines the stack to use after
* cache-as-ram is torn down as well as the MTRR settings to use. */
static void *setup_stack_and_mtrrs(void)
static void platform_enter_postcar(void)
{
struct postcar_frame pcf;
uintptr_t top_of_ram;
@@ -267,5 +270,5 @@ static void *setup_stack_and_mtrrs(void)
postcar_frame_add_mtrr(&pcf, top_of_ram - 8*MiB, 16*MiB,
MTRR_TYPE_WRBACK);
return postcar_commit_mtrrs(&pcf);
run_postcar_phase(&pcf);
}