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soc/intel: Replace config_of_path() with config_of_soc()

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The previously provided device path made no difference, all
integrated PCI devices point back to the same chip_info
structure.

Change reduces the exposure of various SA_DEVFN_xx and
PCH_DEVFN_xx from (ugly) soc/pci_devs.h.

Change-Id: Ibf13645fdd3ef7fd3d5c8217bb24d7ede045c790
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2019-09-28 00:20:27 +03:00
committed by Patrick Georgi
parent d3d38c95b7
commit d5f645c6cd
46 changed files with 72 additions and 79 deletions
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8
src/soc/intel/cannonlake/acpi.c
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@ -145,7 +145,7 @@ acpi_cstate_t *soc_get_cstate_map(size_t *entries)
int *set;
int i;
config_t *config = config_of_path(SA_DEVFN_ROOT);
config_t *config = config_of_soc();
int is_s0ix_enable = config->s0ix_enable;
@ -166,7 +166,7 @@ acpi_cstate_t *soc_get_cstate_map(size_t *entries)
void soc_power_states_generation(int core_id, int cores_per_package)
{
config_t *config = config_of_path(SA_DEVFN_ROOT);
config_t *config = config_of_soc();
/* Generate P-state tables */
if (config->eist_enable)
@ -177,7 +177,7 @@ void soc_fill_fadt(acpi_fadt_t *fadt)
{
const uint16_t pmbase = ACPI_BASE_ADDRESS;
const struct soc_intel_cannonlake_config *config;
config = config_of_path(PCH_DEVFN_LPC);
config = config_of_soc();
if (!config->PmTimerDisabled) {
fadt->pm_tmr_blk = pmbase + PM1_TMR;
@ -202,7 +202,7 @@ uint32_t soc_read_sci_irq_select(void)
void acpi_create_gnvs(struct global_nvs_t *gnvs)
{
const struct soc_intel_cannonlake_config *config;
config = config_of_path(PCH_DEVFN_LPC);
config = config_of_soc();
/* Set unknown wake source */
gnvs->pm1i = -1;