soc/intel/common: Bring DISPLAY_MTRRS into the light
Initially, I wanted to move only the Kconfig DISPLAY_MTRRS into the "Debug" menu. It turned out, though, that the code looks rather generic. No need to hide it in soc/intel/. To not bloat src/Kconfig up any further, start a new `Kconfig.debug` hierarchy just for debug options. If somebody wants to review the code if it's 100% generic, we could even get rid of HAVE_DISPLAY_MTRRS. Change-Id: Ibd0a64121bd6e4ab5d7fd835f3ac25d3f5011f24 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/29684 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nico Huber
committed by
Patrick Georgi
Patrick Georgi
parent
3032d76778
commit
d67edcae6e
@@ -1,5 +1,6 @@
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config SOC_INTEL_COMMON
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bool
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select HAVE_DISPLAY_MTRRS
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help
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common code for Intel SOCs
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@@ -14,10 +15,6 @@ source "src/soc/intel/common/pch/Kconfig"
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comment "Intel SoC Common coreboot stages"
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source "src/soc/intel/common/basecode/Kconfig"
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config DISPLAY_MTRRS
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bool "MTRRs: Display the MTRR settings"
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default n
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config DISPLAY_SMM_MEMORY_MAP
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bool "SMM: Display the SMM memory map"
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default n
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@@ -4,23 +4,18 @@ subdirs-y += basecode/
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subdirs-y += block/
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subdirs-y += pch/
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bootblock-y += util.c
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verstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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bootblock-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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romstage-y += util.c
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romstage-$(CONFIG_MMA) += mma.c
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romstage-y += smbios.c
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postcar-y += util.c
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postcar-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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ramstage-y += hda_verb.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
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ramstage-y += util.c
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ramstage-$(CONFIG_MMA) += mma.c
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ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c
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ramstage-y += vbt.c
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@@ -1,224 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015-2016 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/mtrr.h>
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#include <soc/intel/common/util.h>
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#include <stddef.h>
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uint32_t soc_get_variable_mtrr_count(uint64_t *msr)
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{
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union {
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uint64_t u64;
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msr_t s;
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} mtrrcap;
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mtrrcap.s = rdmsr(MTRR_CAP_MSR);
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if (msr != NULL)
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*msr = mtrrcap.u64;
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return mtrrcap.u64 & MTRR_CAP_VCNT;
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}
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static const char *soc_display_mtrr_type(uint32_t type)
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{
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switch (type) {
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default: return "reserved";
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case 0: return "UC";
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case 1: return "WC";
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case 4: return "WT";
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case 5: return "WP";
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case 6: return "WB";
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case 7: return "UC-";
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}
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}
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static void soc_display_mtrr_fixed_types(uint64_t msr,
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uint32_t starting_address, uint32_t memory_size)
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{
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uint32_t base_address;
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uint32_t index;
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uint32_t next_address;
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uint32_t next_type;
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uint32_t type;
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type = msr & MTRR_DEF_TYPE_MASK;
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base_address = starting_address;
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next_address = base_address;
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for (index = 0; index < 64; index += 8) {
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next_address = starting_address + (memory_size *
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((index >> 3) + 1));
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next_type = (msr >> index) & MTRR_DEF_TYPE_MASK;
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if (next_type != type) {
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printk(BIOS_DEBUG, " 0x%08x - 0x%08x: %s\n",
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base_address, next_address - 1,
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soc_display_mtrr_type(type));
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base_address = next_address;
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type = next_type;
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}
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}
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if (base_address != next_address)
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printk(BIOS_DEBUG, " 0x%08x - 0x%08x: %s\n",
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base_address, next_address - 1,
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soc_display_mtrr_type(type));
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}
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static void soc_display_4k_mtrr(uint32_t msr_reg, uint32_t starting_address,
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const char *name)
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{
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union {
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uint64_t u64;
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msr_t s;
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} msr;
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msr.s = rdmsr(msr_reg);
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printk(BIOS_DEBUG, "0x%016llx: %s\n", msr.u64, name);
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soc_display_mtrr_fixed_types(msr.u64, starting_address, 0x1000);
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}
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static void soc_display_16k_mtrr(uint32_t msr_reg, uint32_t starting_address,
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const char *name)
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{
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union {
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uint64_t u64;
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msr_t s;
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} msr;
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msr.s = rdmsr(msr_reg);
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printk(BIOS_DEBUG, "0x%016llx: %s\n", msr.u64, name);
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soc_display_mtrr_fixed_types(msr.u64, starting_address, 0x4000);
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}
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static void soc_display_64k_mtrr(void)
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{
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union {
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uint64_t u64;
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msr_t s;
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} msr;
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msr.s = rdmsr(MTRR_FIX_64K_00000);
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printk(BIOS_DEBUG, "0x%016llx: IA32_MTRR_FIX64K_00000\n", msr.u64);
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soc_display_mtrr_fixed_types(msr.u64, 0, 0x10000);
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}
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static uint32_t soc_display_mtrrcap(void)
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{
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uint64_t msr;
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uint32_t variable_mtrrs;
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variable_mtrrs = soc_get_variable_mtrr_count(&msr);
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printk(BIOS_DEBUG,
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"0x%016llx: IA32_MTRRCAP: %s%s%s%d variable MTRRs\n",
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msr,
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(msr & MTRR_CAP_SMRR) ? "SMRR, " : "",
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(msr & MTRR_CAP_WC) ? "WC, " : "",
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(msr & MTRR_CAP_FIX) ? "FIX, " : "",
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variable_mtrrs);
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return variable_mtrrs;
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}
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static void soc_display_mtrr_def_type(void)
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{
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union {
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uint64_t u64;
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msr_t s;
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} msr;
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msr.s = rdmsr(MTRR_DEF_TYPE_MSR);
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printk(BIOS_DEBUG, "0x%016llx: IA32_MTRR_DEF_TYPE:%s%s %s\n",
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msr.u64,
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(msr.u64 & MTRR_DEF_TYPE_EN) ? " E," : "",
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(msr.u64 & MTRR_DEF_TYPE_FIX_EN) ? " FE," : "",
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soc_display_mtrr_type((uint32_t)(msr.u64 &
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MTRR_DEF_TYPE_MASK)));
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}
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static void soc_display_variable_mtrr(uint32_t msr_reg, int index,
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uint64_t address_mask)
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{
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uint64_t base_address;
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uint64_t length;
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uint64_t mask;
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union {
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uint64_t u64;
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msr_t s;
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} msr_a;
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union {
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uint64_t u64;
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msr_t s;
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} msr_m;
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msr_a.s = rdmsr(msr_reg);
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msr_m.s = rdmsr(msr_reg + 1);
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if (msr_m.u64 & MTRR_PHYS_MASK_VALID) {
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base_address = (msr_a.u64 & 0xfffffffffffff000ULL)
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& address_mask;
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printk(BIOS_DEBUG,
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"0x%016llx: PHYBASE%d: Address = 0x%016llx, %s\n",
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msr_a.u64, index, base_address,
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soc_display_mtrr_type(msr_a.u64 & MTRR_DEF_TYPE_MASK));
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mask = (msr_m.u64 & 0xfffffffffffff000ULL) & address_mask;
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length = (~mask & address_mask) + 1;
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printk(BIOS_DEBUG,
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"0x%016llx: PHYMASK%d: Length = 0x%016llx, Valid\n",
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msr_m.u64, index, length);
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} else {
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printk(BIOS_DEBUG, "0x%016llx: PHYBASE%d\n", msr_a.u64, index);
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printk(BIOS_DEBUG, "0x%016llx: PHYMASK%d: Disabled\n",
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msr_m.u64, index);
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}
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}
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asmlinkage void soc_display_mtrrs(void)
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{
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if (IS_ENABLED(CONFIG_DISPLAY_MTRRS)) {
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uint32_t address_bits;
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uint64_t address_mask;
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int i;
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int variable_mtrrs;
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/* Display the fixed MTRRs */
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variable_mtrrs = soc_display_mtrrcap();
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soc_display_mtrr_def_type();
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soc_display_64k_mtrr();
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soc_display_16k_mtrr(MTRR_FIX_16K_80000, 0x80000,
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"IA32_MTRR_FIX16K_80000");
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soc_display_16k_mtrr(MTRR_FIX_16K_A0000, 0xa0000,
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"IA32_MTRR_FIX16K_A0000");
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soc_display_4k_mtrr(MTRR_FIX_4K_C0000, 0xc0000,
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"IA32_MTRR_FIX4K_C0000");
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soc_display_4k_mtrr(MTRR_FIX_4K_C8000, 0xc8000,
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"IA32_MTRR_FIX4K_C8000");
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soc_display_4k_mtrr(MTRR_FIX_4K_D0000, 0xd0000,
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"IA32_MTRR_FIX4K_D0000");
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soc_display_4k_mtrr(MTRR_FIX_4K_D8000, 0xd8000,
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"IA32_MTRR_FIX4K_D8000");
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soc_display_4k_mtrr(MTRR_FIX_4K_E0000, 0xe0000,
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"IA32_MTRR_FIX4K_E0000");
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soc_display_4k_mtrr(MTRR_FIX_4K_E8000, 0xe8000,
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"IA32_MTRR_FIX4K_E8000");
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soc_display_4k_mtrr(MTRR_FIX_4K_F0000, 0xf0000,
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"IA32_MTRR_FIX4K_F0000");
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soc_display_4k_mtrr(MTRR_FIX_4K_F8000, 0xf8000,
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"IA32_MTRR_FIX4K_F8000");
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address_bits = cpu_phys_address_size();
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address_mask = (1ULL << address_bits) - 1;
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/* Display the variable MTRRs */
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for (i = 0; i < variable_mtrrs; i++)
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soc_display_variable_mtrr(MTRR_PHYS_BASE(i), i,
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address_mask);
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}
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}
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@@ -1,26 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _INTEL_COMMON_UTIL_H_
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#define _INTEL_COMMON_UTIL_H_
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#include <arch/cpu.h>
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#include <cpu/x86/msr.h>
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#include <stdint.h>
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asmlinkage void soc_display_mtrrs(void);
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uint32_t soc_get_variable_mtrr_count(uint64_t *msr);
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#endif /* _INTEL_COMMON_UTIL_H_ */
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